📄 test1.vwf

📁 FPGA/CPLD VHDL语言实现SPI
💻 VWF
📖 第 1 页 / 共 2 页
字号:
上一页 12
	{
		REPEAT = 1;
		LEVEL X FOR 10000.0;
	}
}

TRANSITION_LIST("dataout[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 10000.0;
	}
}

TRANSITION_LIST("dataout[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 10000.0;
	}
}

TRANSITION_LIST("dataout[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 10000.0;
	}
}

TRANSITION_LIST("write")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 10000.0;
	}
}

TRANSITION_LIST("chip_sel")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 10000.0;
	}
}

TRANSITION_LIST("misoe")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 10000.0;
	}
}

TRANSITION_LIST("scko")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 10000.0;
	}
}

TRANSITION_LIST("slvsel")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 10000.0;
	}
}

TRANSITION_LIST("irq")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 10000.0;
	}
}

TRANSITION_LIST("mosii")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 10000.0;
	}
}

TRANSITION_LIST("rst")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 10000.0;
	}
}

TRANSITION_LIST("misoi")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 10000.0;
	}
}

TRANSITION_LIST("scki")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 10000.0;
	}
}

TRANSITION_LIST("tx_run")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("shift_reg[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("shift_reg[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("shift_reg[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("shift_reg[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("shift_reg[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("shift_reg[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("shift_reg[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("shift_reg[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 10000.0;
	}
}

TRANSITION_LIST("rxtx_fe")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 10000.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "clk";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "addr";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 1;
	TREE_LEVEL = 0;
	CHILDREN = 2, 3;
}

DISPLAY_LINE
{
	CHANNEL = "addr[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 2;
	TREE_LEVEL = 1;
	PARENT = 1;
}

DISPLAY_LINE
{
	CHANNEL = "addr[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 3;
	TREE_LEVEL = 1;
	PARENT = 1;
}

DISPLAY_LINE
{
	CHANNEL = "datain";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 4;
	TREE_LEVEL = 0;
	CHILDREN = 5, 6, 7, 8, 9, 10, 11, 12;
}

DISPLAY_LINE
{
	CHANNEL = "datain[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 5;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "datain[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 6;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "datain[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 7;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "datain[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "datain[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "datain[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 10;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "datain[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 11;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "datain[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 12;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "dataout";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 13;
	TREE_LEVEL = 0;
	CHILDREN = 14, 15, 16, 17, 18, 19, 20, 21;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 14;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 15;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 16;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 17;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 20;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 21;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "write";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 22;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "chip_sel";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 23;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "misoe";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 24;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "scko";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 25;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "slvsel";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 26;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "irq";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 27;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "mosii";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 28;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "rst";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 29;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "misoi";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 30;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "scki";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 31;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "tx_run";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 32;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 33;
	TREE_LEVEL = 0;
	CHILDREN = 34, 35, 36, 37, 38, 39, 40, 41;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 34;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 35;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 36;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 37;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 38;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 39;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 40;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "shift_reg[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 41;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "rxtx_fe";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 42;
	TREE_LEVEL = 0;
}

TIME_BAR
{
	TIME = 0;
	MASTER = TRUE;
}
;
上一页 12
💿 文件大小 244 K
👤 上传用户 dongjunxi126
📂 所属分类嵌入式/单片机编程
🏷️ 相关标签

#FPGA #CPLD #VHDL #SPI
⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -