vspi.sim.rpt

FPGA/CPLD VHDL语言实现SPI

; |vspi|shift_negative_edge~569 ; |vspi|shift_negative_edge~569 ; data_out0        ;
; |vspi|shift_clk_negedge~36    ; |vspi|shift_clk_negedge~36    ; data_out0        ;
; |vspi|slvsel_r1               ; |vspi|slvsel_r1               ; data_out0        ;
; |vspi|bit_ctr~761             ; |vspi|bit_ctr~761             ; data_out0        ;
; |vspi|bit_ctr~764             ; |vspi|bit_ctr~764             ; data_out0        ;
; |vspi|oflow~124               ; |vspi|oflow~124               ; data_out0        ;
; |vspi|addr[0]                 ; |vspi|addr[0]                 ; dataout          ;
; |vspi|slvsel                  ; |vspi|slvsel                  ; dataout          ;
; |vspi|write                   ; |vspi|write                   ; dataout          ;
; |vspi|chip_sel                ; |vspi|chip_sel                ; dataout          ;
; |vspi|rst                     ; |vspi|rst                     ; dataout          ;
; |vspi|misoi                   ; |vspi|misoi                   ; dataout          ;
; |vspi|mosii                   ; |vspi|mosii                   ; dataout          ;
; |vspi|scki                    ; |vspi|scki                    ; dataout          ;
; |vspi|irq                     ; |vspi|irq                     ; padio            ;
; |vspi|misoe                   ; |vspi|misoe                   ; padio            ;
; |vspi|misoo                   ; |vspi|misoo                   ; padio            ;
; |vspi|slvselo[1]              ; |vspi|slvselo[1]              ; padio            ;
; |vspi|slvselo[2]              ; |vspi|slvselo[2]              ; padio            ;
; |vspi|slvselo[3]              ; |vspi|slvselo[3]              ; padio            ;
; |vspi|slvselo[4]              ; |vspi|slvselo[4]              ; padio            ;
+-------------------------------+-------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+----------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                         ;
+-------------------------------+-------------------------------+------------------+
; Node Name                     ; Output Port Name              ; Output Port Type ;
+-------------------------------+-------------------------------+------------------+
; |vspi|slvsel_r3               ; |vspi|slvsel_r3               ; data_out0        ;
; |vspi|ssel[0]                 ; |vspi|ssel[0]                 ; data_out0        ;
; |vspi|ssel[1]                 ; |vspi|ssel[1]                 ; data_out0        ;
; |vspi|ssel[2]                 ; |vspi|ssel[2]                 ; data_out0        ;
; |vspi|ssel[3]                 ; |vspi|ssel[3]                 ; data_out0        ;
; |vspi|ssel[4]                 ; |vspi|ssel[4]                 ; data_out0        ;
; |vspi|col_flag                ; |vspi|col_flag                ; data_out0        ;
; |vspi|ssel[5]                 ; |vspi|ssel[5]                 ; data_out0        ;
; |vspi|oflow                   ; |vspi|oflow                   ; data_out0        ;
; |vspi|ssel[6]                 ; |vspi|ssel[6]                 ; data_out0        ;
; |vspi|irq_flag                ; |vspi|irq_flag                ; data_out0        ;
; |vspi|ssel[7]                 ; |vspi|ssel[7]                 ; data_out0        ;
; |vspi|irq~0                   ; |vspi|irq~0                   ; data_out0        ;
; |vspi|misoe~40                ; |vspi|misoe~40                ; data_out0        ;
; |vspi|misoo~26                ; |vspi|misoo~26                ; data_out0        ;
; |vspi|mosie~38                ; |vspi|mosie~38                ; data_out0        ;
; |vspi|slvsel_r2               ; |vspi|slvsel_r2               ; data_out0        ;
; |vspi|spi_go~17               ; |vspi|spi_go~17               ; data_out0        ;
; |vspi|sck_r2                  ; |vspi|sck_r2                  ; data_out0        ;
; |vspi|sck_r3                  ; |vspi|sck_r3                  ; data_out0        ;
; |vspi|shift_clk~50            ; |vspi|shift_clk~50            ; data_out0        ;
; |vspi|elr_proc~15             ; |vspi|elr_proc~15             ; data_out0        ;
; |vspi|col_flag~85             ; |vspi|col_flag~85             ; data_out0        ;
; |vspi|irq_flag~87             ; |vspi|irq_flag~87             ; data_out0        ;
; |vspi|irq_flag~88             ; |vspi|irq_flag~88             ; data_out0        ;
; |vspi|shift_negative_edge~568 ; |vspi|shift_negative_edge~568 ; data_out0        ;
; |vspi|shift_negative_edge~569 ; |vspi|shift_negative_edge~569 ; data_out0        ;
; |vspi|shift_clk_negedge~36    ; |vspi|shift_clk_negedge~36    ; data_out0        ;
; |vspi|slvsel_r1               ; |vspi|slvsel_r1               ; data_out0        ;
; |vspi|sck_r1                  ; |vspi|sck_r1                  ; data_out0        ;
; |vspi|bit_ctr~761             ; |vspi|bit_ctr~761             ; data_out0        ;
; |vspi|bit_ctr~764             ; |vspi|bit_ctr~764             ; data_out0        ;
; |vspi|slvsel                  ; |vspi|slvsel                  ; dataout          ;
; |vspi|write                   ; |vspi|write                   ; dataout          ;
; |vspi|chip_sel                ; |vspi|chip_sel                ; dataout          ;
; |vspi|rst                     ; |vspi|rst                     ; dataout          ;
; |vspi|misoi                   ; |vspi|misoi                   ; dataout          ;
; |vspi|mosii                   ; |vspi|mosii                   ; dataout          ;
; |vspi|scki                    ; |vspi|scki                    ; dataout          ;
; |vspi|irq                     ; |vspi|irq                     ; padio            ;
; |vspi|misoe                   ; |vspi|misoe                   ; padio            ;
; |vspi|misoo                   ; |vspi|misoo                   ; padio            ;
; |vspi|mosie                   ; |vspi|mosie                   ; padio            ;
; |vspi|scke                    ; |vspi|scke                    ; padio            ;
; |vspi|slvsele                 ; |vspi|slvsele                 ; padio            ;
; |vspi|slvselo[0]              ; |vspi|slvselo[0]              ; padio            ;
; |vspi|slvselo[1]              ; |vspi|slvselo[1]              ; padio            ;
; |vspi|slvselo[2]              ; |vspi|slvselo[2]              ; padio            ;
; |vspi|slvselo[3]              ; |vspi|slvselo[3]              ; padio            ;
; |vspi|slvselo[4]              ; |vspi|slvselo[4]              ; padio            ;
; |vspi|ctl_reg[1]~525          ; |vspi|ctl_reg[1]~525          ; data_out0        ;
+-------------------------------+-------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Fri Dec 07 17:35:04 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off vspi -c vspi
Warning: Ignored node in vector source file. Can't find corresponding node name "rxtx_fe" in design.
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      62.24 %
Info: Number of transitions in simulation is 12556
Info: Vector file vspi.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 1 warning
    Info: Processing ended: Fri Dec 07 17:35:06 2007
    Info: Elapsed time: 00:00:04