etb_example.c

dsp tms320c6486的csl例程

        status = CSL_etbGetHwStatus(hEtb, CSL_ETB_QUERY_TRACECAP_STATUS, 
                                    &response);
	} while (response != CSL_ETB_CTL_TRACECAPEN_ENABLE);

    /* Program trace control based on width */
    *((volatile unsigned int*)TR_CNTL) = 0x0001C07D; /* claim */

    /* Generate the specified trace test pattern */
    if (pattern == 0) {
        flow = 8;
	}
    else if (pattern == 1) {
        flow = 9;
    }
    else if (pattern == 2) {
        flow = 10;
    }
    else if (pattern == 3) {
        flow = 11;
    }

    /* TF_CNTL: width=20, flow=specified, Go=0, Active=0 */
    *((volatile unsigned int*)TF_CNTL) = (0x1400) | (flow); 

    /* TF_CNTL: width=20, flow=specified, Go=1, Active=0 */
    *((volatile unsigned int*)TF_CNTL) = (0x1400) | (flow) | 0x20; 

	/* Put some delay here so that we can test pattern would be captured for 
     * a short period of time. 
     */
	for (i = 0; i < 50; i++) {
		asm ("\tNOP");
	}

	/* change trace clock to be cpu/6 */
	trace_clk_on(6);

	/* Put some delay here so that we can test pattern would be captured for 
     * a short period of time. 
     */
	for (i = 0;i < 50; i++) {
		asm ("\tNOP");
	}

    /* Disable ETB data capture by writing ETB Control Register. */
    status = CSL_etbHwControl(hEtb, CSL_ETB_CMD_DIS_TRACE_CAPTURE, NULL);

	/* Put some delays in here. */
	do {
        status = CSL_etbGetHwStatus(hEtb, CSL_ETB_QUERY_TRACECAP_STATUS, 
                                    &response);
	} while (response != CSL_ETB_CTL_TRACECAPEN_DISABLE);

    /* Read ETB Status Register to poll for acquisition complete */
    do {
        status = CSL_etbGetHwStatus(hEtb, CSL_ETB_QUERY_ACQUISITION_COMPLETE, 
                                    &response);
    } while (response != CSL_ETB_STS_ACQ_COMPLETE); 

    /* Initialize the ETB RAM read pointer register with start_addr */
    status = CSL_etbHwControl(hEtb, CSL_ETB_CMD_SET_RAM_RD_POINTER, 0);

	 memset (&etb_ram_data, 0, sizeof(unsigned int [ETB_RAM_SIZE]));

    /* Now read 4KB trace data out of ETB and log it into L2 memory */
    i = 0;
	
    do {
        /* Read the ETB RAM read data register to retrieve trace data. 
         * This would cause the read pointer register value to auto-increment 
         */
        status = CSL_etbRead(hEtb, &etb_ram_data[i]);
		i++;

    }while (i < 1024);	
    printf("Read 1KB trace data from the RAM read data register into \
            etb_ram_data buffer \n");

    /* Re-nable ETB data capture by writing ETB Control Register. */
    status = CSL_etbHwControl(hEtb, CSL_ETB_CMD_ENA_TRACE_CAPTURE, NULL);

	/* Put some delays in here. */
	do {
        status = CSL_etbGetHwStatus(hEtb, CSL_ETB_QUERY_TRACECAP_STATUS, &response);
	} while (response != CSL_ETB_CTL_TRACECAPEN_ENABLE);

    /* release DTF ownership, DTF_CNTL:AOWN=0, DTFFLUSH=0, DTFENABLE=0, 
     * SPMDISABLE=0, DTFOWN_ST=0 
     */
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_ENA_AOWN_EMU, NULL);
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_FLUSH_DTFFLUSH, 0);
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_SET_DTFENABLE, 0);
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_ENA_SPMDISABLE, NULL);
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_RELEASE_OWNERSHIP, NULL);

    /* Release ownership for trace export block */
    TCU_CNTL = 0x0;

    printf("ETB: Functionality example completes\n");
    return 0;
}

/* =============================================================================
 *   @func   trace_clk_on
 *
 *   @desc
 *      This function Change trace clock frequency.
 *
 *   @arg    None
 *
 *   @return None
 *
 * =============================================================================
 */
int trace_clk_on (
    unsigned int div_val
)
{
	/* turn on trace clock from PLL here. */
	int plldiv_addr;
	int pllcmd_addr;
	int pllcmd_val;
    int plldiv_val;

	pllcmd_addr = 0x029A0138; //PLLCMD register
	plldiv_addr = 0x029A0178;// sysclk12
    
	/* PLLDIV register value: 
	bit 4:0 -- ratio = 00011b (/4), 11111b (/32)
	bit 15 -- DnEn = 1 */
	/* PLL divider value could be from 1 to 32. */
	if (div_val > 32)
		return -1;

	plldiv_val = (1<<15) | (div_val -1);
	*(unsigned int*)plldiv_addr = plldiv_val;

	/* PLLCMD register value:
	bit 1 -- GOSET */
	pllcmd_val = 0x1;
	*(unsigned int*)pllcmd_addr = pllcmd_val;

    return 0;

}

/* =============================================================================
 *   @func   dtf_initialization
 *
 *   @desc
 *      This function initilaizes etb and opens specified instance of dtf.
 *
 *   @arg    None
 *
 *   @return None
 *
 * =============================================================================
 */
void dtf_initialization (
    void
)
{
    CSL_Status     status;

    /* Initialize  DTF CSL module */
    status = CSL_dtfInit(NULL);
    if (status != CSL_SOK) {
        printf("DTF: Initialization... Failed.\n");
        printf("\tReason: CSL_dtfInit failed. [status = %d].\n", status);
        return;
    }
    else {
        printf("DTF: Initialization... Passed.\n");
    }

    /* Open DTF instance and verify */

    memset(&dtfObj, 0, sizeof(CSL_DtfObj));

    /* Open the CSL module for instance 0 */
    hDtf = CSL_dtfOpen(&dtfObj, (CSL_InstNum)CSL_DTF_0, NULL, &status);
    
    if ((hDtf == NULL) || (status != CSL_SOK)) {
        printf("DTF: Opening instance0... Failed.\n");
        printf("\tReason: Error opening the instance0. \
                [status = 0x%x, hDtf = 0x%x]\n", status, hDtf);
        return;
    }
}

/* =============================================================================
 *   @func   etb_initialization
 *
 *   @desc
 *      This function initilaizes etb and opens specified instance of etb.
 *
 *   @arg    None
 *
 *   @return None
 *
 * =============================================================================
 */
void etb_initialization (
    void
)
{
    CSL_Status     status;

    /* Initialize  ETB CSL module */
    status = CSL_etbInit(NULL);
    if (status != CSL_SOK) {
        printf("ETB: Initialization... Failed.\n");
        printf("\tReason: CSL_etbInit failed. [status = %d].\n", status);
        return;
    }
    else {
        printf("ETB: Initialization... Passed.\n");
    }

    /* Open ETB instance and verify */

    memset(&etbObj, 0, sizeof(CSL_EtbObj));

    /* Open the CSL module for instance 0 */
    hEtb = CSL_etbOpen(&etbObj, (CSL_InstNum)CSL_ETB_0, NULL, &status);
    
    if ((hEtb == NULL) || (status != CSL_SOK)) {
        printf("ETB: Opening instance0... Failed.\n");
        printf("\tReason: Error opening the instance0. \
                [status = 0x%x, hEtb = 0x%x]\n", status, hEtb);
        return;
    }
}