etb_example.c

dsp tms320c6486的csl例程

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2006
 *
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.
 *   ===========================================================================
 */
/** ===========================================================================
 *   @file etb_example.c
 *
 *   @path  $(CSLPATH)\example\c6486\etb\src
 *
 *   @desc This is a example of Application Managed On-Chip Capture of Trace 
 *          With Gated SPM output.
 *
 *  ============================================================================
 *   @n Target Platform: TCI6486 VDB
 *  ============================================================================
 *   @n <b> Example Description </b>
 *   @n This is an example of the CSL ETB.
 *   @verbatim
       1. Initialize DTF.
       2. Initialize ETB.
       3. Set trace clock i.e., cpu/3 
       4. Claim DTF ownership
       5. Enable DTF ownership
       6. Claim ownership for trace export block 
       7. Program Pin manager to have EMU pin allocation
       8. Enable ownership for trace export block to start generating trace test 
          pattern. 
       9. Disable formatting and put ETB formatter into bypass mode.
       10.Enable ETB data capture by writing ETB Control Register.
       11.Program trace control based on width
       12.Generate the specified trace test pattern
       13.change trace clock to cpu/6 
       14.Disable ETB data capture by writing ETB Control Register.
       15.Initialize the ETB RAM read pointer register with start_addr
       16.Read 1KB trace data out of ETB and log it into L2 memory
       17.Re-nable ETB data capture by writing ETB Control Register.
       18.Release DTF ownership
       19.Release ownership for trace export block

     @endverbatim
 *
 *=============================================================================
 *      
 *   <b> Procedure to run the example </b>
 *   @verbatim
      1. Configure the CCS setup
      2. Please refer CCS manual for setup configuration and loading 
         proper GEL file
      3. Launch CCS window
      4. Open project Etb_example.pjt
      5. Build the project and load the .out file of the project.

     @endverbatim
 *       
 *   
 * ============================================================================
 */

/* =============================================================================
 *  Revision History
 *  ===============
 *  13-Apr-2006 NG   File Created for basic test of ETB module.
 * =============================================================================
 */
/****************************************************************************/     
/* Include Files                                                            */     
/****************************************************************************/     
#include <csl_etb.h>
#include <csl_dtf.h>
#include <stdio.h>
#include <c6x.h>

/* Size of ETB RAM in 32-bit words */
#define ETB_RAM_SIZE    1024

/* PIN manager MMR address. */
#define PIN_MGR0   0x1BC0130
#define PIN_MGR1   0x1BC0134
#define PIN_MGR2   0x1BC0138 
#define PIN_MGR3   0x1BC0164 

/* Trace control register MMR address. */
#define TR_CNTL    0x1BC013C
#define TF_CNTL    0x1BC014C
#define TR_SYNC    0x1BC0140

/****************************************************************************/     
/* Global Variables                                                         */     
/****************************************************************************/     

/* Define a memory buffer to store the data read out of ETB RAM so that the host 
 * can read out and log to a file. The app code cannot directly log data 
 * into file since we don't have CIO support here as we do in the CCS debugger. 
 */
unsigned int etb_ram_data[ETB_RAM_SIZE];

/****************************************************************************/     
/* Static Functions                                                         */     
/****************************************************************************/     
static int config_gem_trace_pat(int pattern);

CSL_EtbHandle   hEtb;
CSL_DtfHandle   hDtf;
CSL_DtfObj      dtfObj;
CSL_EtbObj      etbObj;

void dtf_initialization();
void etb_initialization();

/* Pragmas used to create special linker section */
#pragma DATA_SECTION(etb_ram_data,".etb_ram_data");

/*
 * =============================================================================
 *   @func   main
 *
 *   @desc
 *     This is the main routine,which invokes the test scripts
 * =============================================================================
*/
void main (
    void
)
{
    unsigned pattern;

	pattern = 1;

    dtf_initialization();

    config_gem_trace_pat(pattern);

}

/* =============================================================================
 *   @func   config_gem_trace_pat
 *
 *   @desc
 *      This function sets up the GEM Pin Manager, trace control/format 
 *      registers to generate the specified test pattern and use DTF/ETB to 
 *      capture. This function also retrieve data from ETB and store them into 
 *      L2 mem for host to check.
 *
 *   @arg 
 *      pattern:  test pattern number (0~3)                                 
 *
 *   @return None
 *
 * =============================================================================
 */
int config_gem_trace_pat (
    int pattern
)
{
    CSL_Status    status;
    Uint32        response;
	Uint32        arg;
    int flow;
	volatile int i;

	/* trace clock is cpu/3 */
    trace_clk_on(3);

    /* claim DTF ownership, DTF_CNTL:AOWN=0, DTFFLUSH=0, DTFENABLE=0, 
     * SPMDISABLE=0, DTFOWN_ST=1 
     */
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_CLAIM_OWNERSHIP, NULL);

	/* check AOWN bit to see if DTF ownership is now owned by app code. */
    status = CSL_dtfGetHwStatus(hDtf, CSL_DTF_QUERY_AOWNERSHIP, &response);
    if (status != CSL_SOK) {
        printf ("DTF: Hardware setup... Failed.\n");
        printf ("\tReason: Error in hardware Setup\n");
        return 0;
    }
    else {
        if (response != CSL_DTF_DTFCR_AOWN_APP) {
            printf ("DTF: Application ownership .... Failed.\n");
            return 0;
        }
        else {
            printf ("DTF: Application ownership .... Passed.\n");
        }
    }

    /* enable DTF ownership, DTF_CNTL:AOWN=0, DTFFLUSH=0, DTFENABLE=0, 
     * SPMDISABLE=0, DTFOWN_ST=2 
     */
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_ENA_OWNERSHIP, NULL);

    /* enable DTF and disable SPM input DTF_CNTL: AOWN=0, DTFFLUSH=0, 
     * DTFENABLE=1, SPMDISABLE=1, DTFOWN_ST=10b 
     */
    arg = 1;
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_SET_DTFENABLE, &arg);
    status = CSL_dtfHwControl(hDtf, CSL_DTF_CMD_DIS_SPMDISABLE, NULL);

    /* Claim ownership for trace export block */
    TCU_CNTL = 0x1;  

    /* Program Pin manager to have EMU pin allocation as follows to conform to 
     * DTF spec 3.2.1 requirements 
     */
    /* EMU0=trace_data[19], EMU1=trace_data[18], ..., EMU19=trace_data[0],
     * EMU20=clock0, EMU21=clock1                                           
     */
    *((volatile unsigned int*)PIN_MGR0) = 0xCCDDEEFF;
    *((volatile unsigned int*)PIN_MGR1) = 0x8899AABB;
    *((volatile unsigned int*)PIN_MGR2) = 0x00556677;
    *((volatile unsigned int*)PIN_MGR3) = 0x00000000;

    /* Enable ownership for trace export block to start generating trace test 
     * pattern. 
     */
    TCU_CNTL |= 0x2;

    etb_initialization();

    /* ETB FIFO reset by writing 0 to ETB RAM Write Pointer Register. */
    arg = 0;
    status = CSL_etbHwControl(hEtb, CSL_ETB_CMD_SET_RAM_WR_POINTER, &arg);

    /* Disable formatting and put ETB formatter into bypass mode. */
    arg = 0;
    status = CSL_etbHwControl(hEtb, CSL_ETB_CMD_SET_ENAFORMATTING, &arg);
    arg = 0;
    status = CSL_etbHwControl(hEtb, CSL_ETB_CMD_SET_CONT_FORMATTING, &arg);

    /* Enable ETB data capture by writing ETB Control Register. */
    status = CSL_etbHwControl(hEtb, CSL_ETB_CMD_ENA_TRACE_CAPTURE, NULL);

	/* Put some delays in here. */
	do {