📄 utopia2_example.c
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/* ============================================================================
* Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2006
*
* Use of this software is controlled by the terms and conditions found
* in the license agreement under which this software has been supplied.
* ============================================================================
*/
/** ============================================================================
* @file Utopia2_example.c
*
* @path $(CSLPATH)\example\utopia2\src
*
* @desc This is an example program for UTOPIA2 of CSL 3x.
* This performs UTOPIA2 user defined cell transfer using PDMA in
* multi-PHY and standard cell mode.
*
* =============================================================================
* @n <b> Example Description </b>
* @verbatim
This Example,
1. Sets up the test bench (UTOPIA2 Master) for multi-PHY mode
2. Enables the utopia2 power/sleep controller
3. Initializes PDMA and sets up Tx and Rx PDMA channels
4. Configures the UTOPIA2 in multi-PHY mode and standard cell mode.
5. Enables the transmit and receive PDMA channel.
6. Sets up the Interrupt.
7. Enables the UTOPIA transmit and receive port.
8. Waits till cell transmit and receive.
9. Verifies the transmited and received data.
@endverbatim
*
* =============================================================================
*
* <b> Procedure to run the example </b>
* @verbatim
* 1. Configure the CCS setup to work with the emulator being used
* 2. Please refer CCS manual for setup configuration and loading
* proper GEL file
* 3. Launch CCS window
* 4. Open project Utopia_udc_mphy.pjt
* 5. Build the project and load the .out file of the project.
*
* @endverbatim
*
*/
/* =============================================================================
* Revision History
* ===============
* 06-Jul-2006 NG File created
* =============================================================================
*/
#include <csl_utopia2.h>
#include <csl_pdma.h>
#include <csl_gpio.h>
#include <example_init.h>
#include <utopia_util.h>
#include <csl_types.h>
#define FAIL 0
#define GEM_ID 0
Uint32 result_buffer[12];
Uint32 result;
extern volatile Uint32 Test_Done;
void utopia2_setup(Uint32 SlaveId,Uint32 Udc,Uint32 PhyMode,
Uint32 Utopia2BitMode);
void PdmaHwSetup(Uint32 num_words);
void PdmaChSetup(Uint32 XmtAddr,Uint32 RcvAddr,
Uint32 num_bytes,Uint32 num_cell,Uint32 sint);
CSL_PdmaObj PdmaObj;
CSL_PdmaHandle hPdma;
CSL_PdmaHwSetup PdmaSetup_Tx;
CSL_PdmaHwSetup PdmaSetup_Rx;
CSL_PdmaGblSetup PdmaGblSetup;
CSL_PdmaPeriCtrlSetup PdmaPeriCtlSetup_Tx;
CSL_PdmaPeriCtrlSetup PdmaPeriCtlSetup_Rx;
CSL_ChHwSetup ChannelSetup_Tx;
CSL_ChHwSetup ChannelSetup_Rx;
CSL_ChannelContext ChanContext_Tx;
CSL_ChannelContext ChanContext_Rx;
CSL_ChanTferCtl ChTferCtl_Tx;
CSL_ChanTferCtl ChTferCtl_Rx;
CSL_Utopia2HwSetup SphyU_Setup;
CSL_Utopia2UcrSetup ucrSetup;
CSL_Utopia2ClkSetup clocksp;
CSL_Utopia2ErrorSetup errorSetup;
CSL_Utopia2Obj myUtopia2Obj;
CSL_Utopia2Handle hUtopia2;
CSL_Utopia2RegsOvly utopia2Regs;
Uint32 TX_CHANNEL_NUM;
Uint32 RX_CHANNEL_NUM;
/*
* =============================================================================
* @func utopia_pdma_txRx
*
* @arg
* NONE
*
* @desc
* Transfers UTOPIA Standard cell through PDMA and receves it back
* with UTOPIA in multi-PHY mode.
*
* @return Uint32
* PASS - the transmitted and received data is same
* FAIL - the received data is different from the transmitted data
*
* =============================================================================
*/
Uint32
utopia_pdma_txRx (
)
{
Uint32 Cell_Num;
CSL_Status pStatus;
Uint32 result=0;
Uint32 Bit_Mode,Phy_Mode;
CSL_BitMask16 Utopia2ErrClear = 0xFFFF;
Uint32 cell_num_bytes=0,cell_num_words =0;
Uint32 cell_num_bytes_pad=0;
Uint32 Udc_Size = 0,Slave_Id = 0;
Uint32 j;
Uint32 *Xmt_Addr;
Uint32 *Rcv_Addr;
Uint32 Sint;
memset(&ChannelSetup_Tx, 0, sizeof(ChannelSetup_Tx));
memset(&ChannelSetup_Rx, 0, sizeof(ChannelSetup_Rx));
memset(&ChanContext_Tx, 0, sizeof(ChanContext_Tx));
memset(&ChanContext_Rx, 0, sizeof(ChanContext_Rx));
ChannelSetup_Tx.chContext = &ChanContext_Tx;
ChannelSetup_Rx.chContext = &ChanContext_Rx;
if (GEM_ID == 0) {
/* Initialization */
UTOPIA_Domain_Enable();
set_design_done(
CSL_GPIO_PIN13, /* gpio_in_pin_num */
CSL_GPIO_PIN12 /* gpio_out_pin_num */
);
UTOPIA_Setup_Interrupt();
Sint = GEM_ID;
TX_CHANNEL_NUM = GEM_ID;
RX_CHANNEL_NUM = GEM_ID + 8;
/* Load cellsize,number of cells */
Cell_Num = Test_List[0].Num_Cell;
Bit_Mode = Test_List[0].Utopia2_bit_mode;
Udc_Size = Test_List[0].Udc;
Slave_Id = Test_List[0].SlaveId;
Phy_Mode = Test_List[0].Utopia2_Mode;
if (Bit_Mode) {
cell_num_bytes = Udc_Size + 54 ;
}
else {
cell_num_bytes = Udc_Size + 53 ;
}
Xmt_Addr = Xmt_srcAddr + GEM_ID * 0x1000000/4 + 0x10000000/4;
Rcv_Addr = Rcv_dstAddr + GEM_ID * 0x1000000/4 + 0x10000000/4;
cell_num_bytes_pad = (cell_num_bytes % 4)?(cell_num_bytes + (4 - (cell_num_bytes %4))):cell_num_bytes;
cell_num_words = cell_num_bytes_pad/4 ;
/* MaskMatch Value setup for GEM_ID */
for (j=0;j < Cell_Num;j++) {
Xmt_Addr[cell_num_words*j+1+GEM_ID] = 0x11+0x11*GEM_ID;
}
/* Initialize Pdma Module */
CSL_pdmaInit(NULL);
hPdma = CSL_pdmaOpen(&PdmaObj, CSL_PDMA, NULL, &pStatus);
/* Pdma setup for Tx */
PdmaHwSetup(cell_num_words);
PdmaChSetup((Uint32)Xmt_Addr,(Uint32)Rcv_Addr,cell_num_bytes_pad, Cell_Num,Sint);
CSL_pdmaHwSetup(hPdma, &PdmaSetup_Tx, TX_EVENT);
CSL_pdmaChHwSetup(hPdma, &ChannelSetup_Tx, TX_CHANNEL_NUM);
/* Pdma setup for Rx */
CSL_pdmaHwSetup(hPdma, &PdmaSetup_Rx, RX_EVENT);
CSL_pdmaChHwSetup(hPdma, &ChannelSetup_Rx, RX_CHANNEL_NUM);
/* Enable Rx and Tx channel */
CSL_pdmaChHwControl(hPdma,PDMA_CHANNEL_ENABLE,TX_CHANNEL_NUM);
CSL_pdmaChHwControl(hPdma,PDMA_CHANNEL_ENABLE,RX_CHANNEL_NUM);
/* Configure UCR - Utopia2 Module Setup and Hnadle Open */
utopia2_setup(Slave_Id, Udc_Size,Phy_Mode, Bit_Mode);
hUtopia2 = CSL_utopia2Open(&myUtopia2Obj, CSL_UTOPIA2,
NULL, &pStatus);
CSL_utopia2HwSetup(hUtopia2, &SphyU_Setup);
set_design_done(
CSL_GPIO_PIN13, /* gpio_in_pin_num */
CSL_GPIO_PIN12 /* gpio_out_pin_num */
);
utopia2Regs = hUtopia2->regs;
CSL_pdmaHwControl(hPdma,PDMA_GLOBAL_ENABLE,(Uint32)NULL);
/* Enable Utopia2 Tx and Rx */
CSL_FINST(utopia2Regs->UCR,UTOPIA2_UCR_UREN,RX_PORT_ENABLE);
CSL_FINST(utopia2Regs->UCR, UTOPIA2_UCR_UXEN, TX_PORT_ENABLE);
/* Clearing the Error Pending Register for Clock Detect Failure */
CSL_utopia2HwControl(hUtopia2, CSL_UTOPIA2_ERROR_CLEAR_CMD, &Utopia2ErrClear);
/* Wait for PDMA tranfer completion */
do {
;
} while(Test_Done != 2);
/* Close All Handles */
CSL_utopia2Close(hUtopia2);
CSL_pdmaClose(hPdma);
Close_Interrupt_Handle();
/* Src Buffer and Destination buffer data compare */
result = Verify_Result((Uint32)Xmt_Addr,(Uint32)Rcv_Addr,
Cell_Num,cell_num_bytes_pad,
cell_num_bytes,Udc_Size,Bit_Mode);
}
return (result);
}
/*
* =============================================================================
* @func PdmaHwSetup
*
* @arg
* NONE
*
* @desc
* This function sets up the pdma hardware .
*
* @return
* NONE
*
* =============================================================================
*/
void
PdmaHwSetup (
Uint32 num_words
)
{
PdmaSetup_Tx.gbl = &PdmaGblSetup;
PdmaSetup_Rx.gbl = &PdmaGblSetup;
PdmaSetup_Tx.pctl = &PdmaPeriCtlSetup_Tx;
PdmaSetup_Rx.pctl = &PdmaPeriCtlSetup_Rx;
PdmaGblSetup.strt = 0x0;
PdmaGblSetup.soft = 0x0;
PdmaGblSetup.free = 0x0;
PdmaPeriCtlSetup_Tx.bend = 0x0;
PdmaPeriCtlSetup_Tx.clrs = 0x0;
PdmaPeriCtlSetup_Tx.sfrm = 0x0;
PdmaPeriCtlSetup_Tx.pe = 0x1;
PdmaPeriCtlSetup_Tx.sync = 0x1;
PdmaPeriCtlSetup_Tx.pri = 0x3;
PdmaPeriCtlSetup_Tx.abu = 0x0;
PdmaPeriCtlSetup_Tx.dir = 0x0;
PdmaPeriCtlSetup_Tx.pblen = (num_words-1);
PdmaPeriCtlSetup_Tx.pmod = 0x1;
PdmaPeriCtlSetup_Tx.sblen = (num_words-1);
PdmaPeriCtlSetup_Tx.smod = 0x0;
PdmaPeriCtlSetup_Rx.bend = 0x0;
PdmaPeriCtlSetup_Rx.clrs = 0x0;
PdmaPeriCtlSetup_Rx.sfrm = 0x0;
PdmaPeriCtlSetup_Rx.pe = 0x2;
PdmaPeriCtlSetup_Rx.sync = 0x1;
PdmaPeriCtlSetup_Rx.pri = 0x3;
PdmaPeriCtlSetup_Rx.abu = 0x1;
PdmaPeriCtlSetup_Rx.dir = 0x1;
PdmaPeriCtlSetup_Rx.pblen = (num_words-1);
PdmaPeriCtlSetup_Rx.pmod = 0x1;
PdmaPeriCtlSetup_Rx.sblen = (num_words-1);
PdmaPeriCtlSetup_Rx.smod = 0x0;
}
/*
* =============================================================================
* @func PdmaChSetup
*
* @arg
* NONE
*
* @desc
* This function sets up the pdma channel .
*
* @return
* NONE
*
* =============================================================================
*/
void
PdmaChSetup (
Uint32 XmtAddr,
Uint32 RcvAddr,
Uint32 num_bytes,
Uint32 num_cell,
Uint32 sint
)
{
Uint32 Buff_Size_Circular;
Buff_Size_Circular = num_bytes;
ChTferCtl_Tx.strt = 0x1;
ChTferCtl_Tx.imod = 0x0;
ChTferCtl_Tx.ie = 0x1;
ChTferCtl_Tx.sint = sint;
ChTferCtl_Tx.psiz = 0x2;
ChTferCtl_Tx.ssiz = 0x2;
ChTferCtl_Tx.ff = 0x0;
ChTferCtl_Tx.bcz = 0x0;
ChTferCtl_Tx.wrptr = 0x0;
ChTferCtl_Tx.rdptr = 0x0;
ChanContext_Tx.SAR = XmtAddr;
ChanContext_Tx.PAR = TxQue_Addr;
ChanContext_Tx.CNT_BUFF = (num_cell*num_bytes);
ChanContext_Tx.TCTL = CSL_FMK(PIM_TCR_STRT,ChTferCtl_Tx.strt)|
CSL_FMK(PIM_TCR_IMOD,ChTferCtl_Tx.imod)|
CSL_FMK(PIM_TCR_IE,ChTferCtl_Tx.ie)|
CSL_FMK(PIM_TCR_SINT,ChTferCtl_Tx.sint)|
CSL_FMK(PIM_TCR_PSIZ,ChTferCtl_Tx.psiz)|
CSL_FMK(PIM_TCR_SSIZ,ChTferCtl_Tx.ssiz)|
CSL_FMK(PIM_TCR_FF,ChTferCtl_Tx.ff)|
CSL_FMK(PIM_TCR_BCZ,ChTferCtl_Tx.bcz)|
CSL_FMK(PIM_TCR_WRPTR,ChTferCtl_Tx.wrptr)|
CSL_FMK(PIM_TCR_RDPTR,ChTferCtl_Tx.rdptr);
ChTferCtl_Rx.strt = 0x1;
ChTferCtl_Rx.imod = 0x1;
ChTferCtl_Rx.ie = 0x1;
ChTferCtl_Rx.sint = sint;
ChTferCtl_Rx.psiz = 0x2;
ChTferCtl_Rx.ssiz = 0x2;
ChTferCtl_Rx.ff = 0x0;
ChTferCtl_Rx.bcz = 0x0;
ChTferCtl_Rx.wrptr = 0x0;
ChTferCtl_Rx.rdptr = 0x0;
ChanContext_Rx.SAR = RcvAddr;
ChanContext_Rx.PAR = RxQue_Addr;
ChanContext_Rx.CNT_BUFF = CSL_FMK(PIM_BUFSIZE_PBUF,Buff_Size_Circular) |
CSL_FMK(PIM_BUFSIZE_SBUF,(num_cell*num_bytes));
ChanContext_Rx.TCTL = CSL_FMK(PIM_TCR_STRT,ChTferCtl_Rx.strt)|
CSL_FMK(PIM_TCR_IMOD,ChTferCtl_Rx.imod)|
CSL_FMK(PIM_TCR_IE,ChTferCtl_Rx.ie)|
CSL_FMK(PIM_TCR_SINT,ChTferCtl_Rx.sint)|
CSL_FMK(PIM_TCR_PSIZ,ChTferCtl_Rx.psiz)|
CSL_FMK(PIM_TCR_SSIZ,ChTferCtl_Rx.ssiz)|
CSL_FMK(PIM_TCR_FF,ChTferCtl_Rx.ff)|
CSL_FMK(PIM_TCR_BCZ,ChTferCtl_Rx.bcz)|
CSL_FMK(PIM_TCR_WRPTR,ChTferCtl_Rx.wrptr)|
CSL_FMK(PIM_TCR_RDPTR,ChTferCtl_Rx.rdptr);
}
/*
* =============================================================================
* @func utopia_setup
*
* @arg
* NONE
*
* @desc
* This function initializes utopia2 configurations.
*
* @return
* NONE
*
* =============================================================================
*/
void
utopia2_setup (
Uint32 SlaveId,
Uint32 Udc,
Uint32 PhyMode,
Uint32 Utopia2BitMode
)
{
/* Utopia2 Setup for Multiphy */
SphyU_Setup.ucrSetup = &ucrSetup;
/* Big Endian */
ucrSetup.Endianness = 0;
/* User Defined Cell 53B */
ucrSetup.txUdc = Udc;
/* User Defined Cell 53B */
ucrSetup.rxUdc = Udc;
/* Utopia2 Tx Enable */
ucrSetup.txUtopia2Enable = 0;
/* Utopia2 Rx Enable */
ucrSetup.rxUtopia2Enable = 0;
/* Utopia2 Single PHY */
ucrSetup.phyModeEnable = PhyMode;
/* Utopia2 16/8 bit Mode */
ucrSetup.utopia2BitMode = Utopia2BitMode;
/* Fixed Addr Mode */
ucrSetup.utopia2PollingMode = 0;
/* Slave ID */
ucrSetup.slendSlid = SlaveId;
SphyU_Setup.clkSetup = &clocksp;
/* Set utopia2 Rx clock count */
clocksp.rxClkCount = 0xFF;
/* Set utopia2 Tx clock count */
clocksp.txClkCount = 0xFF;
SphyU_Setup.errorSetup = &errorSetup;
errorSetup.txClkFailIntEnb = 0;
errorSetup.rxClkFailIntEnb = 0;
errorSetup.txClkPresentIntEnb = 0;
errorSetup.rxClkPresentIntEnb = 0;
errorSetup.txQueueStallIntEnb = 0;
errorSetup.rxQueueStallIntEnb = 0;
errorSetup.txClkFail = 0;
errorSetup.rxClkFail = 0;
errorSetup.txClkPresent = 0;
errorSetup.rxClkPresent = 0;
}
/*
* =============================================================================
* @func main
*
* @desc
* This is the main routine for the file.
*
* =============================================================================
*/
void
main (
void
)
{
Uint32 result = FAIL;
result = utopia_pdma_txRx();
if (result == PASS) {
printf("Source data destination data matches\n");
printf("TEST PASS: Data tranmist and receive successfull\n");
}
else {
printf("Source data destination data does not matches\n");
printf("TEST FAIL: Data tranmist and receive fails\n");
}
}
/* End of Utopia2_example.c */
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