ddr2_narrow_mode_read_write_example.c

dsp tms320c6486的csl例程

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
 *
 *   Use of this software is controlled by the terms and conditions found
 *   in the license agreement under which this software has been supplied.
 *  ============================================================================
 */

/** ============================================================================
 *
 *   @file Ddr2_narrow_mode_read_write_example.c
 *
 *   @path $(CSLPATH)\example\c6486\ddr2\Ddr2_narrow_mode_read_write_example\src
 *
 *   @desc Example of DDR2
 *
 * =============================================================================
 *   @n <b> Example Description </b>
 *   @n In this example, the DDR2 SDRAM is initialized to the values configured
 *      description for reading and writing to and from it..
 * =============================================================================
 *      
 *   <b> Test Procedure </b>
 *   @verbatim
 *      1. Configure the CCS setup to work with the emulator being used
 *      2. Please refer CCS manual for setup configuration and loading 
 *         proper GEL file
 *      3. Launch CCS window
 *      4. Open project Ddr2_ReadWrite_example.pjt
 *      5. Build the project and load the .out file of the project.
 *      6. The example can be executed from the main().
 *          
 *   @endverbatim
 *
 */

/* =============================================================================
 *  Revision History
 *  ===============
 *  21-May-2005 Ramitha Mathew. created
 *
 * =============================================================================
 */
#include <csl_ddr2.h>
#include <stdio.h>

/** Result - Passed */
#define PASSED 	    1
/** Result - Failed */
#define FAILED 	    0

/** Data count(number write/readbacks) */
#define DATA_CNT    10

#define EMIF_CE0_BASE_ADDR            (0xE0000000u) 
#define SDRAM_REFRESH_RATE_DEFAULT     (0x0753)

/* Handle for the DDR2 instance */
CSL_Ddr2Handle    hDdr2;

void ddr2ReadWrite(void);

/*
 * =============================================================================
 *   @func   main
 *
 *   @desc
 *     This is the main routine for the file.  
 *    
 * =============================================================================
 */
void main (
    void
)
{   
    /* read_write functionality of DDR2 */
    ddr2ReadWrite();   
    return; 
}

/*
 * =============================================================================
 *   @func   ddr2ReadWrite
 *
 *   @desc
 *     This function verifies the functionality of DDR2 EMIF with the setup
 *     It implements following steps
 *			1. It opens the DDR2 module CSL
 *			2. The CSL_ddr2HwSetup is called for module configuration
 *          3. Enable 16 bit DDR2 SDRAM using CSL_ddr2HwSetup
 *			4. It writes into SDRAM area and reads back, to make sure the data
 *             is indeed written. 
 *			5. DDR2 module CSL is closed.
 *
 *   @arg    None
 *
 *   @Precondition
 *    - DDR2 configuring function in the GEL file; if present should be disabled
 *
 *   @expected result
 *      If status is PASS, it displays the message "READ-WRITE PASSED"
 *      If status is FAIL, it displays the message "READ-WRITE FAILED" and 
 *      provides the error message
 *
 *   @eg
 *      ddr2ReadWrite();
 *
 * =============================================================================
 */
void ddr2ReadWrite (
    void
)
{
    volatile Uint32     result, index ;
    Uint16              tempData; 
    CSL_Ddr2Obj         ddr2Obj;
    CSL_Status          status;
    CSL_Ddr2HwSetup     hwSetup ;     
    
    CSL_Ddr2Timing1     tim1 = CSL_DDR2_TIMING1_DEFAULTS;
    CSL_Ddr2Timing2     tim2 = CSL_DDR2_TIMING2_DEFAULTS;
    CSL_Ddr2Settings    set  = CSL_DDR2_SETTING_DEFAULTS;    

    /* Pointer that points to SDRAM start area */
    Uint16 *pDdr2Data = (Uint16 *)EMIF_CE0_BASE_ADDR;

    /* Clear local data structures */   
    memset(&ddr2Obj, 0, sizeof(CSL_Ddr2Obj));      
    memset(&hwSetup, 0, sizeof(CSL_Ddr2HwSetup));
    
    /* setup the hardware parameters */
    hwSetup.refreshRate = SDRAM_REFRESH_RATE_DEFAULT;
    hwSetup.timing1Param = &tim1;
    hwSetup.timing2Param = &tim2;
    set. narrowMode		 = CSL_DDR2_NARROW_MODE;
    hwSetup.setParam = &set;    
        
    /* Initialize DDR2 CSL module */
    status = CSL_ddr2Init(NULL);
    if (status != CSL_SOK) {
        printf ("DDR2 EMIF: Initialization... Failed.\n");
        printf ("\tReason: CSL_ddr2Init failed. [status = 0x%x].\n", status);		
        return;
    }
    else {
        printf ("DDR2 EMIF: Module Initialization... Passed.\n");
    }

    /* Opening the DDR2 instance */
    hDdr2 =  CSL_ddr2Open (&ddr2Obj, CSL_DDR2, NULL, &status);
    if ((status != CSL_SOK) || (hDdr2 == NULL)) {
        printf ("DDR2 EMIF: Opening instance... Failed.\n");
        printf ("\tReason: Error opening the instance. [status = 0x%x, hDdr2 = \
                   0x%x]\n", status, hDdr2);		
        return;
    }
    else {
        printf ("DDR2 EMIF: Module instance open... Passed.\n");
    }

    /* Setting up configuration parameter using HwSetup */
    status =  CSL_ddr2HwSetup (hDdr2, &hwSetup);                     
    if (status != CSL_SOK) {
        printf ("DDR2 EMIF: Hardware setup... Failed.\n");
        printf ("\tReason: Unknown error in HW Setup.\n");        
    }
    else {
        printf ("DDR2 EMIF: Module Hardware setup... Passed.\n");
    }
    
    /* Clearing old values with a recognizable value into DDR2 SDRAM area. 
     * This is to ensure that data from previous run, doesn't fool us to 
     * pass the test 
     */
    tempData = 0xdead;
    for (index = 0; index < DATA_CNT; index++) {
	    pDdr2Data[index] =  tempData;
    }

	/* Write **valid** values into SDRAM area. */
    tempData = 0x5678;
	for (index = 0; index < DATA_CNT; index++) {
		pDdr2Data[index] = tempData;
	}

	/* Verify that the data was indeed written */
	result = PASSED;
	for (index = 0; index < DATA_CNT; index++) {
		if (pDdr2Data[index] != tempData) {
			result = FAILED;			          
			break ;
		}
	}

	/* Print the appropriate message based on result */
	if (result == PASSED) {		
	   	printf("\nWrite to and Read from DDR2 SDRAM .....passed\n"); 
	}
    else {     	
	   	printf("\nWrite to and Read from DDR2 SDRAM ......failed\n"); 
        printf("\tError in data read.[status = 0x%x]\n", status);
    }   
}