armmode.s

s3c44b0 arm工作模式实验

#*********************************************************************************************
# NAME:		ARMmode.s																		 *
# Author: 	Embest																			 *
# Desc:		ARM instruction examples														 *
#           Example for C ARMmode conversion												 *
# History:	shw.He 2005.02.22																 *
#*********************************************************************************************

/*------------------------------------------------------------------------------------------*/
/*	 								constant define						 				    */
/*------------------------------------------------------------------------------------------*/
.global _start

/*------------------------------------------------------------------------------------------*/
/*	 								code								 				    */
/*------------------------------------------------------------------------------------------*/
.text
_start:

/*------------------------------------------------------------------------------------------*/
/* Setup interrupt / exception vectors														*/
/*------------------------------------------------------------------------------------------*/
	    b		Reset_Handler
Undefined_Handler:
	    b		Undefined_Handler
	    b		SWI_Handler
Prefetch_Handler:
	    b		Prefetch_Handler
Abort_Handler:
	    b		Abort_Handler
	    nop										/* Reserved vector */
IRQ_Handler:
	    b		IRQ_Handler
FIQ_Handler:
	    b		FIQ_Handler

SWI_Handler:
		mov pc, lr


Reset_Handler:

/*------------------------------------------------------------------------------------------*/
/* 	into system mode													                    */
/*------------------------------------------------------------------------------------------*/
		mrs r0,cpsr								/* read CPSR value */ 
		bic r0,r0,#0x1f							/* clear low 5 bit */ 
		orr r0,r0,#0x1f			/* set the mode as System mode */  
		msr cpsr,r0								/* write the data into CPSR */	
		mov r0, #1								/* initialization the register in System mode */
		mov r1, #2	
		mov r2, #3	
		mov r3, #4	
		mov r4, #5	
		mov r5, #6	
		mov r6, #7	
		mov r7, #8	
		mov r8, #9	
		mov r9, #10	
		mov r10, #11	
		mov r11, #12
		mov r12, #13	
		mov r13, #14	
		mov r14, #15

/*------------------------------------------------------------------------------------------*/
/* 	into  user mode													                    	*/
/*------------------------------------------------------------------------------------------*/
		mrs r0,cpsr
		bic r0,r0,#0x1f
		orr r0,r0,#0x10				/* set the mode as FIQ mode */
		msr cpsr,r0										
		mov r8, #16								/* initialization the register in FIQ mode */
		mov r9, #17	
		mov r10, #18	
		mov r11, #19	
		mov r12, #20	
		mov r13, #21	
		mov r14, #22
		
/*------------------------------------------------------------------------------------------*/
/* 	into system mode													                    	*/
/*------------------------------------------------------------------------------------------*/
		mrs r0,cpsr
		bic r0,r0,#0x1f
		orr r0,r0,#0x1f		/* set the mode as SVC mode */	
		msr cpsr,r0
		mov r8,#12
		mov r13, #23							/* initialization the register in SVC mode */
		mov r14, #24
		
/*------------------------------------------------------------------------------------------*/
/* 	into user mode													                    	*/
/*------------------------------------------------------------------------------------------*/
		mrs r0,cpsr
		bic r0,r0,#0x1f
		orr r0,r0,#0x10						/* set the mode as Abort mode */
		msr cpsr,r0
		mov r13, #25							/* initialization the register in Abort mode */
		mov r14, #26
		
/*------------------------------------------------------------------------------------------*/
/* 	into  IRQ mode													                    	*/
/*------------------------------------------------------------------------------------------*/
		mrs r0,cpsr
		bic r0,r0,#0x1f
		orr r0,r0,#0x12							/* set the mode as IRQ mode */
		msr cpsr,r0
		mov r8,#11
		mov r13, #27							/* initialization the register in IRQ mode */
		mov r14, #28
		
/*------------------------------------------------------------------------------------------*/
/* 	into  system mode													                    */
/*------------------------------------------------------------------------------------------*/
		mrs r0,cpsr
		bic r0,r0,#0x1f
		orr r0,r0,#0x1f						/* set the mode as UNDEF mode */
		msr cpsr,r0
		mov r8,#21
		mov r13, #29							/* initialization the register in UNDEF mode */
		mov r14, #30

		b	Reset_Handler

.end