m8s01.lst

AVR MEGA8双机串行口通讯程序,单工485方式,用于单片机组网,有PROTEUS仿真电路,可以立刻验证

__start:
__text_start:
    001B E5CF      LDI	R28,0x5F
    001C E0D4      LDI	R29,4
    001D BFCD      OUT	0x3D,R28
    001E BFDE      OUT	0x3E,R29
    001F 51C0      SUBI	R28,0x10
    0020 40D0      SBCI	R29,0
    0021 EA0A      LDI	R16,0xAA
    0022 8308      STD	Y+0,R16
    0023 2400      CLR	R0
    0024 E6EF      LDI	R30,0x6F
    0025 E0F0      LDI	R31,0
    0026 E010      LDI	R17,0
    0027 39ED      CPI	R30,0x9D
    0028 07F1      CPC	R31,R17
    0029 F011      BEQ	0x002C
    002A 9201      ST	R0,Z+
    002B CFFB      RJMP	0x0027
    002C 8300      STD	Z+0,R16
    002D E2E6      LDI	R30,0x26
    002E E0F0      LDI	R31,0
    002F E6A0      LDI	R26,0x60
    0030 E0B0      LDI	R27,0
    0031 E010      LDI	R17,0
    0032 33E5      CPI	R30,0x35
    0033 07F1      CPC	R31,R17
    0034 F021      BEQ	0x0039
    0035 95C8      LPM
    0036 9631      ADIW	R30,1
    0037 920D      ST	R0,X+
    0038 CFF9      RJMP	0x0032
    0039 D170      RCALL	_main
_exit:
    003A CFFF      RJMP	_exit
FILE: E:\m8com\M8SP01.c
(0001) //////////从机
(0002) 
(0003) #include <iom8v.h>
(0004) #include <macros.h>
(0005) //ISARM pro
(0006) #define OUTLED1OFF PORTB|=0x01       //for 
(0007) #define OUTLED1ON PORTB&=~0x01
(0008) #define OUTLED2OFF PORTB|=0x02       //For 
(0009) #define OUTLED2ON PORTB&=~0x02
(0010) #define OUTLED2Pulse PORTB^=0x02
(0011) 
(0012) #define OUTLED3OFF PORTB|=0x04      //For 
(0013) #define OUTLED3ON PORTB&=~0x04
(0014) #define OUTLED3Pulse PORTB^=0x04
(0015) #define OUTLED4OFF PORTB|=0x08      //For 
(0016) #define OUTLED4ON PORTB&=~0x08
(0017) #define OUTLED4Pulse PORTB^=0x08
(0018) 
(0019) #define OUTDEON PORTD|=0x10
(0020) #define OUTDEOFF PORTD&=~0x10
(0021) 
(0022) #define KB0 (PINC&0x01)
(0023) #define KB1 (PINC&0x02)
(0024) 
(0025) 
(0026) ///UART///
(0027) #define TXENABLE UCSRB&=~(1<<RXEN);UCSRB|=(1<<TXEN); 
(0028) #define RXENABLE UCSRB&=~(1<<TXEN);UCSRB|=(1<<RXEN); 
(0029) #define RXADDRESS UCSRA|=(1<<MPCM);TRADFG=0;
(0030) #define RXDATA UCSRA&=~(1<<MPCM);TRADFG=1;
(0031) //
(0032) #define TRFG0 0xFE
(0033) #define TRFG1 0xFD
(0034) #define TRFG2 0xF1
(0035) #define TRFG3 0xF0
(0036) //子板编号
(0037) #define SlaveAdress 5
(0038) //////////////////////////////
(0039) unsigned char TRADFG=0;  //0收地址，1收数据
(0040) unsigned char RDHIS=0xff;
(0041) 
(0042) unsigned char SlaveCR=0;  //子板编号计数器，当作物理地址
(0043) unsigned char TXINTMAX=12;//下行发送中断次数控制值
(0044) //unsigned char TXINTCR=0;//下行发送中断次数计数器
(0045) unsigned char TXINTFG=0;//下行发送中断次数完成标志
(0046) unsigned char RXINTMAX=16;//下行发送中断次数控制值
(0047) unsigned char RXINTCR=0;//下行发送中断次数计数器
(0048) unsigned char RXINTFG=0;//下行发送中断次数完成标志
(0049) 
(0050) unsigned char TXBUF[16]; //发送缓冲区
(0051) unsigned char RXBUF[30];  //接收缓冲区
(0052) unsigned char TXbufP=0;  //发送缓冲区下标
(0053) unsigned char RXbufP=0;  //接收缓冲区下标
(0054) unsigned char RXbufPmax=11;//接收数据实际长度
(0055) 
(0056) unsigned char RXERROR=0;
(0057) /////Soft Timer
(0058) unsigned char WaitCR0=0;
(0059) unsigned char WaitCR1=0;
(0060) 
(0061) unsigned char SLSTEP=10;
(0062) 
(0063) 
(0064) void SoftTimer(void)
(0065)   {
(0066)     WaitCR0++;
_SoftTimer:
    003B 9180006C  LDS	R24,0x6C
    003D 5F8F      SUBI	R24,0xFF
    003E 9380006C  STS	0x6C,R24
(0067) 	if(WaitCR0>254)
    0040 EF8E      LDI	R24,0xFE
    0041 9020006C  LDS	R2,0x6C
    0043 1582      CP	R24,R2
    0044 F440      BCC	0x004D
(0068) 	 {
(0069) 	  WaitCR0=0;
    0045 2422      CLR	R2
    0046 9220006C  STS	0x6C,R2
(0070) 	  WaitCR1++;
    0048 9180006D  LDS	R24,0x6D
    004A 5F8F      SUBI	R24,0xFF
    004B 9380006D  STS	0x6D,R24
(0071) 	 }//if(WaitCR0>0)
    004D 9508      RET
(0072)   }
(0073) void SoftTimerStart(void)
(0074)   {
(0075)    WaitCR0=0;
_SoftTimerStart:
    004E 2422      CLR	R2
    004F 9220006C  STS	0x6C,R2
(0076)    WaitCR1=0;
    0051 9220006D  STS	0x6D,R2
    0053 9508      RET
(0077)   }
(0078)   
(0079) void watchdog_init(void)
(0080)      {
(0081) 	   WDR();
_watchdog_init:
    0054 95A8      WDR
(0082) 	   WDTCR=0x0F ;
    0055 E08F      LDI	R24,0xF
    0056 BD81      OUT	0x21,R24
    0057 9508      RET
(0083) 	 }
(0084) 	 
(0085) void Delay_1ms(void)
(0086) 	{
(0087) 	unsigned int i;
(0088) 
(0089) 	for (i = 1; i<1140; i++)
_Delay_1ms:
  i                    --> R16
    0058 E001      LDI	R16,1
    0059 E010      LDI	R17,0
    005A C002      RJMP	0x005D
    005B 5F0F      SUBI	R16,0xFF
    005C 4F1F      SBCI	R17,0xFF
    005D 3704      CPI	R16,0x74
    005E E0E4      LDI	R30,4
    005F 071E      CPC	R17,R30
    0060 F3D0      BCS	0x005B
    0061 9508      RET
_delayXms:
  i                    --> R20
  n                    --> R22
    0062 D1D2      RCALL	push_gset2
    0063 01B8      MOVW	R22,R16
(0090) 		
(0091) 			;
(0092) 	}
(0093) 
(0094) void delayXms(unsigned int n)
(0095)      {
(0096) 	   unsigned int i=0;
    0064 2744      CLR	R20
    0065 2755      CLR	R21
    0066 C003      RJMP	0x006A
(0097) 	   while(i<n)
(0098) 	     {
(0099) 		  Delay_1ms();
    0067 DFF0      RCALL	_Delay_1ms
(0100) 		  i++;
    0068 5F4F      SUBI	R20,0xFF
    0069 4F5F      SBCI	R21,0xFF
    006A 1746      CP	R20,R22
    006B 0757      CPC	R21,R23
    006C F3D0      BCS	0x0067
    006D D1AE      RCALL	pop_gset2
    006E 9508      RET
(0101) 		 }
(0102) 	 }
(0103) 	 
(0104) 	 
(0105) void port_init(void)
(0106)      {
(0107) 	 
(0108) 					 
(0109) 	  PORTB=0xFF;    //PB set to 1
_port_init:
    006F EF8F      LDI	R24,0xFF
    0070 BB88      OUT	0x18,R24
(0110) 	  DDRB=0xFF;     
    0071 BB87      OUT	0x17,R24
(0111) 					 
(0112) 	  PORTC=0xFF;    //PC set to 1
    0072 BB85      OUT	0x15,R24
(0113) 	  DDRC=0x00;     //
    0073 2422      CLR	R2
    0074 BA24      OUT	0x14,R2
(0114) 	      
(0115) 	  PORTD=0xFF;    //PD set to 1
    0075 BB82      OUT	0x12,R24
(0116) 	  DDRD=0x12;     //PD0:RXD PD1:TXD PD2:DI0 PD3:DI1
    0076 E182      LDI	R24,0x12
    0077 BB81      OUT	0x11,R24
(0117) 	                 //PD4:DI2  PD5:DI3 
(0118) 	  //OUTDEON;
(0119) 	  
(0120) 	SFIOR&=~(1<<PUD);  //OPEN UP LINK
    0078 B780      IN	R24,0x30
    0079 7F8B      ANDI	R24,0xFB
    007A BF80      OUT	0x30,R24
(0121) 	//MCUCR|=(1<<ISC11); //Down edge int1
(0122) 	//GICR=(1<<INT1); //enable INT1
(0123) 	  
(0124) 	  delayXms(10); //delay 1s
    007B E00A      LDI	R16,0xA
    007C E010      LDI	R17,0
    007D DFE4      RCALL	_delayXms
    007E 9508      RET
(0125) 	 }
(0126) //////////////////////////UART INIT
(0127) void uart_init(void) 
(0128)    {
(0129)     
(0130)     OUTDEOFF;
_uart_init:
    007F 9894      CBI	0x12,4
(0131)     UCSRB=0x00;
    0080 2422      CLR	R2
    0081 B82A      OUT	0x0A,R2
(0132) 	//UBRRL=0x25;  //19.2kbps
(0133) 	UBRRL=0x1;  //38.4kbps
    0082 E081      LDI	R24,1
    0083 B989      OUT	0x09,R24
(0134) 	//TX EN ,9Bit ,Adress init
(0135) 	RXADDRESS
    0084 9A58      SBI	0x0B,0
    0085 92200060  STS	0x60,R2
(0136) 	UCSRB=((1<<RXCIE)|(1<<TXCIE)|(1<<UCSZ2));
    0087 EC84      LDI	R24,0xC4
    0088 B98A      OUT	0x0A,R24
    0089 9508      RET
(0137) 	//UCSRB=((1<<TXCIE)|(1<<TXCIE)|(1<<TXEN)|(1<<TXB8));
(0138)    }//void uart_init(void) 
(0139) 
(0140) ///////////////Timer init	 
(0141) void timer_init(void)
(0142)      {
(0143) 	  ;
_timer_init:
    008A 9508      RET
(0144) 	 }	 	 
(0145) 	
(0146) 
(0147) #pragma interrupt_handler timer1_ovf_isr:9
(0148) void timer1_ovf_isr(void)
(0149) {	
(0150) 	 ;  
_timer1_ovf_isr:
    008B 9518      RETI
_uart1_tx_isr:
    008C 922A      ST	R2,-Y
    008D 938A      ST	R24,-Y
    008E 939A      ST	R25,-Y
    008F 93EA      ST	R30,-Y
    0090 93FA      ST	R31,-Y
    0091 B62F      IN	R2,0x3F
    0092 922A      ST	R2,-Y
(0151) 	 
(0152) }//void timer1_ovf_isr(void)
(0153) 
(0154) //TR to SLAVE
(0155) #pragma interrupt_handler uart1_tx_isr:14
(0156) void uart1_tx_isr(void)
(0157)  {
(0158)     
(0159) 	TXbufP++;
    0093 91800068  LDS	R24,0x68
    0095 5F8F      SUBI	R24,0xFF
    0096 93800068  STS	0x68,R24
(0160) 	
(0161) 	   if(TXbufP==TXINTMAX) //发送完成
    0098 90200063  LDS	R2,0x63
    009A 1582      CP	R24,R2
    009B F429      BNE	0x00A1
(0162) 	    {	       
(0163) 		 OUTDEOFF; 
    009C 9894      CBI	0x12,4
(0164) 		 SLSTEP=10;
    009D E08A      LDI	R24,0xA
    009E 9380006E  STS	0x6E,R24
(0165) 		 
(0166) 	    }//if(TXbufP>TXINTMAX)
    00A0 C009      RJMP	0x00AA
(0167) 	 else
(0168) 	  {
(0169) 	   UDR=TXBUF[TXbufP];  
    00A1 E88D      LDI	R24,0x8D
    00A2 E090      LDI	R25,0
    00A3 91E00068  LDS	R30,0x68
    00A5 27FF      CLR	R31
    00A6 0FE8      ADD	R30,R24
    00A7 1FF9      ADC	R31,R25
    00A8 8020      LDD	R2,Z+0
    00A9 B82C      OUT	0x0C,R2
(0170) 	  }//else
    00AA 9029      LD	R2,Y+
    00AB BE2F      OUT	0x3F,R2
    00AC 91F9      LD	R31,Y+
    00AD 91E9      LD	R30,Y+
    00AE 9199      LD	R25,Y+
    00AF 9189      LD	R24,Y+
    00B0 9029      LD	R2,Y+
    00B1 9518      RETI
_uart1_rx_isr:
  TmpD                 --> R16
    00B2 922A      ST	R2,-Y
    00B3 923A      ST	R3,-Y
    00B4 930A      ST	R16,-Y
    00B5 938A      ST	R24,-Y
    00B6 939A      ST	R25,-Y
    00B7 93EA      ST	R30,-Y
    00B8 93FA      ST	R31,-Y
    00B9 B62F      IN	R2,0x3F
    00BA 922A      ST	R2,-Y
(0171) 	
(0172)  }//void uart1_tx_isr(void)
(0173) 
(0174) #pragma interrupt_handler uart1_rx_isr:12
(0175) void uart1_rx_isr(void)
(0176)  {	
(0177)     unsigned char TmpD=0;
    00BB 2700      CLR	R16
(0178) 	
(0179) 	TmpD=UDR;
    00BC B10C      IN	R16,0x0C
(0180) 	
(0181) 	if(TRADFG==0)
    00BD 90200060  LDS	R2,0x60
    00BF 2022      TST	R2
    00C0 F489      BNE	0x00D2
(0182) 	 {
(0183) 	  if((TmpD==SlaveAdress) && (RDHIS==SlaveAdress))
    00C1 3005      CPI	R16,5
    00C2 F461      BNE	0x00CF
    00C3 91800061  LDS	R24,0x61
    00C5 3085      CPI	R24,5
    00C6 F441      BNE	0x00CF
(0184) 	   {
(0185) 	    OUTLED2ON;
    00C7 98C1      CBI	0x18,1
(0186) 	    RXDATA	   
    00C8 9858      CBI	0x0B,0
    00C9 E081      LDI	R24,1
    00CA 93800060  STS	0x60,R24
(0187) 		RXbufP=0;
    00CC 2422      CLR	R2
    00CD 92200069  STS	0x69,R2
(0188) 	   }//if(TmpD==SlaveAdress && RDHIS==SlaveAdress)
(0189) 	  RDHIS=TmpD;
    00CF 93000061  STS	0x61,R16
(0190) 	 }//if(ADFG==0)
    00D1 C012      RJMP	0x00E4
(0191) 	else
(0192) 	  {
(0193) 	   
(0194)        if(RXbufP<RXINTMAX)
    00D2 90200065  LDS	R2,0x65
    00D4 90300069  LDS	R3,0x69
    00D6 1432      CP	R3,R2
    00D7 F420      BCC	0x00DC
(0195) 	     {
(0196) 		 
(0197) 	     RXbufP++;
    00D8 2D83      MOV	R24,R3
    00D9 5F8F      SUBI	R24,0xFF
    00DA 93800069  STS	0x69,R24
(0198) 	     }		
(0199) 	     RXBUF[RXbufP]=TmpD;
    00DC E68F      LDI	R24,0x6F
    00DD E090      LDI	R25,0
    00DE 91E00069  LDS	R30,0x69
    00E0 27FF      CLR	R31
    00E1 0FE8      ADD	R30,R24
    00E2 1FF9      ADC	R31,R25
    00E3 8300      STD	Z+0,R16
(0200) 	    
(0201) 	  }//else
    00E4 9029      LD	R2,Y+
    00E5 BE2F      OUT	0x3F,R2
    00E6 91F9      LD	R31,Y+
    00E7 91E9      LD	R30,Y+
    00E8 9199      LD	R25,Y+
    00E9 9189      LD	R24,Y+
    00EA 9109      LD	R16,Y+
    00EB 9039      LD	R3,Y+
    00EC 9029      LD	R2,Y+
    00ED 9518      RETI
(0202)  }//void uart1_rx_isr(void)
(0203) void TXbufRDY(void)
(0204) {
(0205)  
(0206)  TXBUF[0]=TRFG0;
_TXbufRDY:
    00EE EF8E      LDI	R24,0xFE
    00EF 9380008D  STS	_TXBUF,R24
(0207)  TXBUF[1]=TRFG1;
    00F1 EF8D      LDI	R24,0xFD
    00F2 9380008E  STS	_TXBUF+1,R24