lab5.tan.qmsg

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{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "prog_ram:prog_ram\|instruction\[1\] " "Info: Node \"prog_ram:prog_ram\|instruction\[1\]\"" {  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "prog_ram:prog_ram\|instruction\[11\] " "Info: Node \"prog_ram:prog_ram\|instruction\[11\]\"" {  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "prog_ram:prog_ram\|instruction\[8\] " "Info: Node \"prog_ram:prog_ram\|instruction\[8\]\"" {  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "prog_ram:prog_ram\|instruction\[9\] " "Info: Node \"prog_ram:prog_ram\|instruction\[9\]\"" {  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "prog_ram:prog_ram\|instruction\[5\] " "Info: Node \"prog_ram:prog_ram\|instruction\[5\]\"" {  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "prog_ram:prog_ram\|instruction\[4\] " "Info: Node \"prog_ram:prog_ram\|instruction\[4\]\"" {  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}  } { { "prog_ram.v" "" { Text "C:/altera/lab5/prog_ram.v" 3 -1 0 } }  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clock " "Info: Assuming node \"clock\" is an undefined clock" {  } { { "lab2_sim.v" "" { Text "C:/altera/lab5/lab2_sim.v" 5 -1 0 } } { "c:/altera/quartus50sp1/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50sp1/bin/Assignment Editor.qase" 1 { { 0 "clock" } } } }  } 0}  } {  } 0}