s3c2410uart2.c

s3c2440串口2驱动

#include "vxWorks.h"
#include "intLib.h"
#include "errnoLib.h"
#include "errno.h"
#include "sioLib.h"
#include "s3c2410xSio.h"
#include "s3c2410x.h"
#include "s3c2410UART2.h"
#include "stdio.h"
#include "iv.h"

#define rUTRSTAT2   (*(volatile unsigned *)0x50008010)	
#define rGPHUP     (*(volatile unsigned *)0x56000078)	
#define rCLKCON     (*(volatile unsigned *)0x4c00000c)
#define rGPHCON    (*(volatile unsigned *)0x56000070)
#define RdURXH2()   (*(volatile unsigned char *)0x50008024)
volatile static char *uart2TxStr="ABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890->UART2 Tx interrupt test is good!!!!\r\n";;
/* define */
#define DEFAULT_UART2_BAUD 9600


/* hardware access methods */
#ifndef s3c2410x_UART2_REG_READ
#define s3c2410x_UART2_REG_READ(base_addr,reg,result) \
	((result) = *(volatile UINT32 *)((UINT32)base_addr + reg))
#endif

#ifndef s3c2410x_UART2_REG_WRITE
#define s3c2410x_UART2_REG_WRITE(base_addr,reg,data) \
	(*((volatile UINT32 *)((UINT32)base_addr + reg)) = (data))
#endif

#ifndef s3c2410x_INT_REG_READ
#define s3c2410x_INT_REG_READ(reg,result) \
	((result) = *(volatile UINT32 *)(reg))
#endif

#ifndef s3c2410x_INT_REG_WRITE
#define s3c2410x_INT_REG_WRITE(reg,data) \
	(*((volatile UINT32 *)(reg)) = (data))
#endif

/* The default is to assume memory mapped I/O */
#ifndef s3c2410x_IO_READ
	#define s3c2410x_IO_READ(reg,result) ((result)=*(volatile UINT32 *)(reg))
#endif

#ifndef s3c2410x_IO_WRITE
	#define s3c2410x_IO_WRITE(reg, data) (*((volatile UINT32 *)(reg))=(data))
#endif

UART2_DOWNLOAD sUART2DownLoadFile;

/*
 * s3c2410xUART2IntRx - read FIFO
 *
 * This routine reads  s3c2410x UART2 FIFO for recv data from PC
 * RETURNS: N/A
 */
void s3c2410xUART2IntRx ( void )
{
    unsigned char ucCharNumber, ii;
    UINT32 dwRxFIFOStatus;
    UINT32 tempUINT32 = 0;

	/* clear subpending of the RXn */
    s3c2410x_INT_REG_WRITE(s3c2410x_INT_CSR_SUBSRCPND, (1<<SUBINT_LVL_RXD2));
  
	/* read datas from Receive FIFO. */
/*    s3c2410x_UART2_REG_READ(UART_2_BASE_ADR, OFFSET_UFSTAT, dwRxFIFOStatus);
    if( UFSTAT_RXFULL & dwRxFIFOStatus )
    {
        ucCharNumber = 16;  
    }
    else
    {
        ucCharNumber = ( unsigned char )( UFSTAT_RFCNT & dwRxFIFOStatus );
    }
    */
 /*  logMsg("ucCharNumber=%d\n",ucCharNumber,0,0,0,0,0);*/

    s3c2410x_UART2_REG_READ(UART_2_BASE_ADR, OFFSET_UFCON, tempUINT32);/*maybe not need*/
    tempUINT32 |= RxFifoReset;
/*    s3c2410x_UART2_REG_WRITE(UART_2_BASE_ADR,OFFSET_UFCON,tempUINT32); */
  tempUINT32 = RdURXH2();
  logMsg("tempUINT32=%x\n",tempUINT32,0,0,0,0,0);
  
}

/*
 * s3c2410xUART2IntTx - Transmit data interrupt
 *
 * This routine transmits to PC. But now ,it isnot used 
 * RETURNS: N/A
 */
void s3c2410xUART2IntTx ( void )
{
    /* clear subpending of the TXn */
    s3c2410x_INT_REG_WRITE(s3c2410x_INT_CSR_SUBSRCPND, (1<<SUBINT_LVL_TXD2));
    
    /*Do nothing*/
}

/*
 * s3c2410xUART2IntErr - Process UART2 ERROR interrupt
 *
 * This routine processes UART Error
 * RETURNS: N/A
 */
void s3c2410xUART2IntErr ( void )
{
    /* clear subpending of the TXn */
    s3c2410x_INT_REG_WRITE(s3c2410x_INT_CSR_SUBSRCPND, (1<<SUBINT_LVL_ERR2));
    
    /*Do nothing*/
}

/*
 * s3c2410xUART2Int - handle any UART2 interrupt
 *
 * This routine handles interrupts from the UART2 and determines whether
 * the source is a transmit interrupt or receive/receive-timeout interrupt.
 *
 * The Prime Cell UART2 generates a receive interrupt when the RX FIFO is
 * full, and a receive-timeout interrupt after 32 bit-clocks have
 * elapsed with no incoming data.
 *
 * RETURNS: N/A
 */

void s3c2410xUART2Int ( UINT32 dwInput )
{
    UINT32 intId;


    s3c2410x_INT_REG_READ(s3c2410x_INT_CSR_SUBSRCPND, intId);

    if(intId & (1<<SUBINT_LVL_TXD2))
    {
        s3c2410xUART2IntTx ( );		
    }

    if(intId & (1<<SUBINT_LVL_RXD2))
    {
        s3c2410xUART2IntRx ( );
    }

    if(intId & (1<<SUBINT_LVL_ERR2))
    {
        s3c2410xUART2IntErr ( );
    }

    s3c2410x_INT_REG_WRITE(s3c2410x_INT_CSR_SRCPND, (1 << INT_LVL_UART_2) );/*Clear the suspend bit*/
   
  s3c2410x_INT_REG_WRITE(s3c2410x_INT_CSR_INTSUBMSK, 0);
 logMsg("Enter interrupt\n",0,0,0,0,0,0);

}


void mytestUart2Tx()
{
  char ca;
  uart2TxStr="ABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890->UART2 Tx interrupt test is good!!!!\r\n";
  logMsg("[Uart channel 2 Tx Interrupt Test]\n",0,0,0,0,0,0);
    taskDelay(30);
    while(*uart2TxStr != '\0') 
  {
    ca=*uart2TxStr;
    logMsg("%c\n",ca,0,0,0,0,0);
    taskDelay(30);
  
   /* WrUTXH2(*uart2TxStr);*/
   (*(volatile unsigned char *)0x50008020)=(unsigned char)(ca);
      
     while(!(rUTRSTAT2 & 0x4));
   /* logMsg("Write one byte success !\n",0,0,0,0,0,0);
     taskDelay(30);*/
     uart2TxStr++;
   }
  logMsg("Uart2 send over!\n",0,0,0,0,0,0);
       taskDelay(30); 
  
}

/*
 * s3c2410xUART2DevInit - initialise s3c2410x UART2
 *
 * This routine initialises  s3c2410x UART2 for download files from PC
 * RETURNS: N/A
 */
UINT dwTemp;
void s3c2410xUART2DevInit ( void )
{
    UINT32 tempUINT32 = 0;
    int oldlevel = intLock();

  rGPHCON&=0xffff000f;
  rGPHCON|=0x0aaa0;	/* enable all uart channel*/
 /* rGPHUP|=0x1ff;*/	/*Uart port pull-up disable*/
 
 /*  rCLKCON|=0x3000;*/
    /* Set PCLK as CLK source, interrupt mode only. */
/*    s3c2410x_UART2_REG_WRITE(UART_2_BASE_ADR, OFFSET_UCON, CLK_PCLK+TxInt_Level+RxInt_Level+RxTimeOut_ON+TxMode_IntPoll+RxMode_IntPoll);*/
	s3c2410x_UART2_REG_WRITE(UART_2_BASE_ADR, OFFSET_UCON, CLK_PCLK+TxMode_IntPoll+RxMode_IntPoll);

    /* enable subInterrupt for UART2. */
    s3c2410x_INT_REG_READ(s3c2410x_INT_CSR_INTSUBMSK,tempUINT32);
    tempUINT32 &= ~((1<<SUBINT_LVL_RXD2)|(1<<SUBINT_LVL_TXD2));
    s3c2410x_INT_REG_WRITE(s3c2410x_INT_CSR_INTSUBMSK,tempUINT32);

    /* Set baud rate to 9600. */
    s3c2410x_UART2_REG_WRITE(UART_2_BASE_ADR,OFFSET_UDIV,(((s3c2410x_PCLK/16)/DEFAULT_UART2_BAUD)-1));

    /* Set NonInfra-red mode, 8, N, 1. */
    s3c2410x_UART2_REG_WRITE(UART_2_BASE_ADR,OFFSET_ULCON,InfraRed_OFF+NO_PARITY+ONE_STOPBIT+DATABIT_8);
	
    /* Enable FIFO ,reset FIFO*/
   /* s3c2410x_UART2_REG_WRITE(UART_2_BASE_ADR,OFFSET_UFCON,TxTrigger_12+RxTrigger_16+FIFO_OFF+TxFifoReset+RxFifoReset);*/
    s3c2410x_UART2_REG_WRITE(UART_2_BASE_ADR, OFFSET_UFCON, FIFO_OFF);


    /* Enable pin for UART2 */
   /* s3c2410x_IO_READ(rGPHCON, tempUINT32);*/
 /*   tempUINT32 &= ~(MASK_GPH6(3)+MASK_GPH7(3));*/
  /*  tempUINT32 |= MASK_GPH6(2)+MASK_GPH7(2);
    s3c2410x_IO_WRITE(rGPHCON,tempUINT32);*/
	
    /* Clear Rx and rset FIFO*/
    s3c2410x_UART2_REG_READ(UART_2_BASE_ADR, OFFSET_URXH, tempUINT32);
/*    s3c2410x_UART2_REG_WRITE(UART_2_BASE_ADR,OFFSET_UFCON,TxTrigger_12+RxTrigger_16+FIFO_ON+TxFifoReset+RxFifoReset);*/

			s3c2410x_INT_REG_READ(s3c2410x_INT_CSR_INTSUBMSK,tempUINT32);
			tempUINT32 |= ((1<<SUBINT_LVL_RXD2)|(1<<SUBINT_LVL_TXD2));
			s3c2410x_INT_REG_WRITE(s3c2410x_INT_CSR_INTSUBMSK,tempUINT32);

    intUnlock(oldlevel);
	
    /*Enable and start Connect*/
    ( void )intConnect( INUM_TO_IVEC(INT_VEC_UART_2), s3c2410xUART2Int, dwTemp );
   intEnable(INT_LVL_UART_2); 

			s3c2410x_INT_REG_READ(s3c2410x_INT_CSR_INTSUBMSK,tempUINT32);
     logMsg("tempUINT32 =0x%x\n",tempUINT32,0,0,0,0,0);
 
	s3c2410x_UART2_REG_READ(UART_2_BASE_ADR, OFFSET_UTRSTAT, tempUINT32);

	/* is the transmitter ready to accept a character? */
 logMsg("Intital Over\n",0,0,0,0,0,0);

  /* mytestUart2Tx();*/
	/* write out the character */

    logMsg("Intital Over\n",0,0,0,0,0,0);
}