dds_sin.fit.summary

用vhdl编写的程序

Fitter Status : Successful - Tue Sep 12 15:10:37 2006
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : dds_sin
Top-level Entity Name : dds_sin
Family : Cyclone
Device : EP1C3T144C8
Timing Models : Final
Total logic elements : 566 / 2,910 ( 19 % )
Total pins : 48 / 104 ( 46 % )
Total virtual pins : 0
Total memory bits : 51,200 / 59,904 ( 85 % )
Total PLLs : 1 / 1 ( 100 % )