dds_sin.hier_info

用vhdl编写的程序

clock0 => ram_block1a7.CLK0
clock0 => ram_block1a8.CLK0
clock0 => ram_block1a9.CLK0
q_a[0] <= ram_block1a0.PORTADATAOUT
q_a[1] <= ram_block1a1.PORTADATAOUT
q_a[2] <= ram_block1a2.PORTADATAOUT
q_a[3] <= ram_block1a3.PORTADATAOUT
q_a[4] <= ram_block1a4.PORTADATAOUT
q_a[5] <= ram_block1a5.PORTADATAOUT
q_a[6] <= ram_block1a6.PORTADATAOUT
q_a[7] <= ram_block1a7.PORTADATAOUT
q_a[8] <= ram_block1a8.PORTADATAOUT
q_a[9] <= ram_block1a9.PORTADATAOUT


|dds_sin|mul_6:mul
clock => kk:u1.clock0
dataa_0[0] => kk:u1.dataa_0[0]
dataa_0[1] => kk:u1.dataa_0[1]
dataa_0[2] => kk:u1.dataa_0[2]
dataa_0[3] => kk:u1.dataa_0[3]
dataa_1[0] => kk:u1.dataa_1[0]
dataa_1[1] => kk:u1.dataa_1[1]
dataa_1[2] => kk:u1.dataa_1[2]
dataa_1[3] => kk:u1.dataa_1[3]
dataa_2[0] => kk:u1.dataa_2[0]
dataa_2[1] => kk:u1.dataa_2[1]
dataa_2[2] => kk:u1.dataa_2[2]
dataa_2[3] => kk:u1.dataa_2[3]
datab_0[0] => kk:u1.datab_0[0]
datab_0[1] => kk:u1.datab_0[1]
datab_0[2] => kk:u1.datab_0[2]
datab_0[3] => kk:u1.datab_0[3]
datab_0[4] => kk:u1.datab_0[4]
datab_0[5] => kk:u1.datab_0[5]
datab_0[6] => kk:u1.datab_0[6]
datab_0[7] => kk:u1.datab_0[7]
datab_0[8] => kk:u1.datab_0[8]
datab_0[9] => kk:u1.datab_0[9]
datab_1[0] => kk:u1.datab_1[0]
datab_1[1] => kk:u1.datab_1[1]
datab_1[2] => kk:u1.datab_1[2]
datab_1[3] => kk:u1.datab_1[3]
datab_1[4] => kk:u1.datab_1[4]
datab_1[5] => kk:u1.datab_1[5]
datab_1[6] => kk:u1.datab_1[6]
datab_1[7] => kk:u1.datab_1[7]
datab_1[8] => kk:u1.datab_1[8]
datab_1[9] => kk:u1.datab_1[9]
datab_2[0] => kk:u1.datab_2[0]
datab_2[1] => kk:u1.datab_2[1]
datab_2[2] => kk:u1.datab_2[2]
datab_2[3] => kk:u1.datab_2[3]
datab_2[4] => kk:u1.datab_2[4]
datab_2[5] => kk:u1.datab_2[5]
datab_2[6] => kk:u1.datab_2[6]
datab_2[7] => kk:u1.datab_2[7]
datab_2[8] => kk:u1.datab_2[8]
datab_2[9] => kk:u1.datab_2[9]
result[0] <= ll:u2.quotient[0]
result[1] <= ll:u2.quotient[1]
result[2] <= ll:u2.quotient[2]
result[3] <= ll:u2.quotient[3]
result[4] <= ll:u2.quotient[4]
result[5] <= ll:u2.quotient[5]
result[6] <= ll:u2.quotient[6]
result[7] <= ll:u2.quotient[7]
result[8] <= ll:u2.quotient[8]
result[9] <= ll:u2.quotient[9]
result[10] <= ll:u2.quotient[10]
result[11] <= ll:u2.quotient[11]
result[12] <= ll:u2.quotient[12]
result[13] <= ll:u2.quotient[13]
result[14] <= ll:u2.quotient[14]
result[15] <= ll:u2.quotient[15]


|dds_sin|mul_6:mul|kk:u1
clock0 => altmult_add:ALTMULT_ADD_component.clock0
dataa_0[0] => altmult_add:ALTMULT_ADD_component.dataa[0]
dataa_0[1] => altmult_add:ALTMULT_ADD_component.dataa[1]
dataa_0[2] => altmult_add:ALTMULT_ADD_component.dataa[2]
dataa_0[3] => altmult_add:ALTMULT_ADD_component.dataa[3]
dataa_1[0] => altmult_add:ALTMULT_ADD_component.dataa[4]
dataa_1[1] => altmult_add:ALTMULT_ADD_component.dataa[5]
dataa_1[2] => altmult_add:ALTMULT_ADD_component.dataa[6]
dataa_1[3] => altmult_add:ALTMULT_ADD_component.dataa[7]
dataa_2[0] => altmult_add:ALTMULT_ADD_component.dataa[8]
dataa_2[1] => altmult_add:ALTMULT_ADD_component.dataa[9]
dataa_2[2] => altmult_add:ALTMULT_ADD_component.dataa[10]
dataa_2[3] => altmult_add:ALTMULT_ADD_component.dataa[11]
datab_0[0] => altmult_add:ALTMULT_ADD_component.datab[0]
datab_0[1] => altmult_add:ALTMULT_ADD_component.datab[1]
datab_0[2] => altmult_add:ALTMULT_ADD_component.datab[2]
datab_0[3] => altmult_add:ALTMULT_ADD_component.datab[3]
datab_0[4] => altmult_add:ALTMULT_ADD_component.datab[4]
datab_0[5] => altmult_add:ALTMULT_ADD_component.datab[5]
datab_0[6] => altmult_add:ALTMULT_ADD_component.datab[6]
datab_0[7] => altmult_add:ALTMULT_ADD_component.datab[7]
datab_0[8] => altmult_add:ALTMULT_ADD_component.datab[8]
datab_0[9] => altmult_add:ALTMULT_ADD_component.datab[9]
datab_1[0] => altmult_add:ALTMULT_ADD_component.datab[10]
datab_1[1] => altmult_add:ALTMULT_ADD_component.datab[11]
datab_1[2] => altmult_add:ALTMULT_ADD_component.datab[12]
datab_1[3] => altmult_add:ALTMULT_ADD_component.datab[13]
datab_1[4] => altmult_add:ALTMULT_ADD_component.datab[14]
datab_1[5] => altmult_add:ALTMULT_ADD_component.datab[15]
datab_1[6] => altmult_add:ALTMULT_ADD_component.datab[16]
datab_1[7] => altmult_add:ALTMULT_ADD_component.datab[17]
datab_1[8] => altmult_add:ALTMULT_ADD_component.datab[18]
datab_1[9] => altmult_add:ALTMULT_ADD_component.datab[19]
datab_2[0] => altmult_add:ALTMULT_ADD_component.datab[20]
datab_2[1] => altmult_add:ALTMULT_ADD_component.datab[21]
datab_2[2] => altmult_add:ALTMULT_ADD_component.datab[22]
datab_2[3] => altmult_add:ALTMULT_ADD_component.datab[23]
datab_2[4] => altmult_add:ALTMULT_ADD_component.datab[24]
datab_2[5] => altmult_add:ALTMULT_ADD_component.datab[25]
datab_2[6] => altmult_add:ALTMULT_ADD_component.datab[26]
datab_2[7] => altmult_add:ALTMULT_ADD_component.datab[27]
datab_2[8] => altmult_add:ALTMULT_ADD_component.datab[28]
datab_2[9] => altmult_add:ALTMULT_ADD_component.datab[29]
result[0] <= altmult_add:ALTMULT_ADD_component.result[0]
result[1] <= altmult_add:ALTMULT_ADD_component.result[1]
result[2] <= altmult_add:ALTMULT_ADD_component.result[2]
result[3] <= altmult_add:ALTMULT_ADD_component.result[3]
result[4] <= altmult_add:ALTMULT_ADD_component.result[4]
result[5] <= altmult_add:ALTMULT_ADD_component.result[5]
result[6] <= altmult_add:ALTMULT_ADD_component.result[6]
result[7] <= altmult_add:ALTMULT_ADD_component.result[7]
result[8] <= altmult_add:ALTMULT_ADD_component.result[8]
result[9] <= altmult_add:ALTMULT_ADD_component.result[9]
result[10] <= altmult_add:ALTMULT_ADD_component.result[10]
result[11] <= altmult_add:ALTMULT_ADD_component.result[11]
result[12] <= altmult_add:ALTMULT_ADD_component.result[12]
result[13] <= altmult_add:ALTMULT_ADD_component.result[13]
result[14] <= altmult_add:ALTMULT_ADD_component.result[14]
result[15] <= altmult_add:ALTMULT_ADD_component.result[15]


|dds_sin|mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component
dataa[0] => mult_add_rh23:auto_generated.dataa[0]
dataa[1] => mult_add_rh23:auto_generated.dataa[1]
dataa[2] => mult_add_rh23:auto_generated.dataa[2]
dataa[3] => mult_add_rh23:auto_generated.dataa[3]
dataa[4] => mult_add_rh23:auto_generated.dataa[4]
dataa[5] => mult_add_rh23:auto_generated.dataa[5]
dataa[6] => mult_add_rh23:auto_generated.dataa[6]
dataa[7] => mult_add_rh23:auto_generated.dataa[7]
dataa[8] => mult_add_rh23:auto_generated.dataa[8]
dataa[9] => mult_add_rh23:auto_generated.dataa[9]
dataa[10] => mult_add_rh23:auto_generated.dataa[10]
dataa[11] => mult_add_rh23:auto_generated.dataa[11]
datab[0] => mult_add_rh23:auto_generated.datab[0]
datab[1] => mult_add_rh23:auto_generated.datab[1]
datab[2] => mult_add_rh23:auto_generated.datab[2]
datab[3] => mult_add_rh23:auto_generated.datab[3]
datab[4] => mult_add_rh23:auto_generated.datab[4]
datab[5] => mult_add_rh23:auto_generated.datab[5]
datab[6] => mult_add_rh23:auto_generated.datab[6]
datab[7] => mult_add_rh23:auto_generated.datab[7]
datab[8] => mult_add_rh23:auto_generated.datab[8]
datab[9] => mult_add_rh23:auto_generated.datab[9]
datab[10] => mult_add_rh23:auto_generated.datab[10]
datab[11] => mult_add_rh23:auto_generated.datab[11]
datab[12] => mult_add_rh23:auto_generated.datab[12]
datab[13] => mult_add_rh23:auto_generated.datab[13]
datab[14] => mult_add_rh23:auto_generated.datab[14]
datab[15] => mult_add_rh23:auto_generated.datab[15]
datab[16] => mult_add_rh23:auto_generated.datab[16]
datab[17] => mult_add_rh23:auto_generated.datab[17]
datab[18] => mult_add_rh23:auto_generated.datab[18]
datab[19] => mult_add_rh23:auto_generated.datab[19]
datab[20] => mult_add_rh23:auto_generated.datab[20]
datab[21] => mult_add_rh23:auto_generated.datab[21]
datab[22] => mult_add_rh23:auto_generated.datab[22]
datab[23] => mult_add_rh23:auto_generated.datab[23]
datab[24] => mult_add_rh23:auto_generated.datab[24]
datab[25] => mult_add_rh23:auto_generated.datab[25]
datab[26] => mult_add_rh23:auto_generated.datab[26]
datab[27] => mult_add_rh23:auto_generated.datab[27]
datab[28] => mult_add_rh23:auto_generated.datab[28]
datab[29] => mult_add_rh23:auto_generated.datab[29]
addnsub1 => ~NO_FANOUT~
addnsub3 => ~NO_FANOUT~
signa => ~NO_FANOUT~
signb => ~NO_FANOUT~
clock0 => mult_add_rh23:auto_generated.clock0
clock1 => ~NO_FANOUT~
clock2 => ~NO_FANOUT~
clock3 => ~NO_FANOUT~
ena0 => ~NO_FANOUT~
ena1 => ~NO_FANOUT~
ena2 => ~NO_FANOUT~
ena3 => ~NO_FANOUT~
aclr0 => ~NO_FANOUT~
aclr1 => ~NO_FANOUT~
aclr2 => ~NO_FANOUT~
aclr3 => ~NO_FANOUT~
scanina[0] => ~NO_FANOUT~
scanina[1] => ~NO_FANOUT~
scanina[2] => ~NO_FANOUT~
scanina[3] => ~NO_FANOUT~
sourcea[0] => ~NO_FANOUT~
sourcea[1] => ~NO_FANOUT~
sourcea[2] => ~NO_FANOUT~
scaninb[0] => ~NO_FANOUT~
scaninb[1] => ~NO_FANOUT~
scaninb[2] => ~NO_FANOUT~
scaninb[3] => ~NO_FANOUT~
scaninb[4] => ~NO_FANOUT~
scaninb[5] => ~NO_FANOUT~
scaninb[6] => ~NO_FANOUT~
scaninb[7] => ~NO_FANOUT~
scaninb[8] => ~NO_FANOUT~
scaninb[9] => ~NO_FANOUT~
sourceb[0] => ~NO_FANOUT~
sourceb[1] => ~NO_FANOUT~
sourceb[2] => ~NO_FANOUT~
mult01_round => ~NO_FANOUT~
mult23_round => ~NO_FANOUT~
addnsub1_round => ~NO_FANOUT~
addnsub3_round => ~NO_FANOUT~
mult01_saturation => ~NO_FANOUT~
mult23_saturation => ~NO_FANOUT~
result[0] <= mult_add_rh23:auto_generated.result[0]
result[1] <= mult_add_rh23:auto_generated.result[1]
result[2] <= mult_add_rh23:auto_generated.result[2]
result[3] <= mult_add_rh23:auto_generated.result[3]
result[4] <= mult_add_rh23:auto_generated.result[4]
result[5] <= mult_add_rh23:auto_generated.result[5]
result[6] <= mult_add_rh23:auto_generated.result[6]
result[7] <= mult_add_rh23:auto_generated.result[7]
result[8] <= mult_add_rh23:auto_generated.result[8]
result[9] <= mult_add_rh23:auto_generated.result[9]
result[10] <= mult_add_rh23:auto_generated.result[10]
result[11] <= mult_add_rh23:auto_generated.result[11]
result[12] <= mult_add_rh23:auto_generated.result[12]
result[13] <= mult_add_rh23:auto_generated.result[13]
result[14] <= mult_add_rh23:auto_generated.result[14]
result[15] <= mult_add_rh23:auto_generated.result[15]
scanouta[0] <= <GND>
scanouta[1] <= <GND>
scanouta[2] <= <GND>
scanouta[3] <= <GND>
scanoutb[0] <= <GND>
scanoutb[1] <= <GND>
scanoutb[2] <= <GND>
scanoutb[3] <= <GND>
scanoutb[4] <= <GND>
scanoutb[5] <= <GND>
scanoutb[6] <= <GND>
scanoutb[7] <= <GND>
scanoutb[8] <= <GND>
scanoutb[9] <= <GND>
mult0_is_saturated <= <GND>
mult1_is_saturated <= <GND>
mult2_is_saturated <= <GND>
mult3_is_saturated <= <GND>


|dds_sin|mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component|mult_add_rh23:auto_generated
clock0 => alt_mac_mult:mac_mult1.clk[0]
clock0 => alt_mac_mult:mac_mult2.clk[0]
clock0 => alt_mac_mult:mac_mult3.clk[0]
clock0 => alt_mac_out:mac_out4.clk[0]
dataa[0] => alt_mac_mult:mac_mult1.dataa[0]
dataa[1] => alt_mac_mult:mac_mult1.dataa[1]
dataa[2] => alt_mac_mult:mac_mult1.dataa[2]
dataa[3] => alt_mac_mult:mac_mult1.dataa[3]
dataa[4] => alt_mac_mult:mac_mult2.dataa[0]
dataa[5] => alt_mac_mult:mac_mult2.dataa[1]
dataa[6] => alt_mac_mult:mac_mult2.dataa[2]
dataa[7] => alt_mac_mult:mac_mult2.dataa[3]
dataa[8] => alt_mac_mult:mac_mult3.dataa[0]
dataa[9] => alt_mac_mult:mac_mult3.dataa[1]
dataa[10] => alt_mac_mult:mac_mult3.dataa[2]
dataa[11] => alt_mac_mult:mac_mult3.dataa[3]
datab[0] => alt_mac_mult:mac_mult1.datab[0]
datab[1] => alt_mac_mult:mac_mult1.datab[1]
datab[2] => alt_mac_mult:mac_mult1.datab[2]
datab[3] => alt_mac_mult:mac_mult1.datab[3]
datab[4] => alt_mac_mult:mac_mult1.datab[4]
datab[5] => alt_mac_mult:mac_mult1.datab[5]
datab[6] => alt_mac_mult:mac_mult1.datab[6]
datab[7] => alt_mac_mult:mac_mult1.datab[7]
datab[8] => alt_mac_mult:mac_mult1.datab[8]
datab[9] => alt_mac_mult:mac_mult1.datab[9]
datab[10] => alt_mac_mult:mac_mult2.datab[0]
datab[11] => alt_mac_mult:mac_mult2.datab[1]
datab[12] => alt_mac_mult:mac_mult2.datab[2]
datab[13] => alt_mac_mult:mac_mult2.datab[3]
datab[14] => alt_mac_mult:mac_mult2.datab[4]
datab[15] => alt_mac_mult:mac_mult2.datab[5]
datab[16] => alt_mac_mult:mac_mult2.datab[6]
datab[17] => alt_mac_mult:mac_mult2.datab[7]
datab[18] => alt_mac_mult:mac_mult2.datab[8]
datab[19] => alt_mac_mult:mac_mult2.datab[9]
datab[20] => alt_mac_mult:mac_mult3.datab[0]
datab[21] => alt_mac_mult:mac_mult3.datab[1]
datab[22] => alt_mac_mult:mac_mult3.datab[2]
datab[23] => alt_mac_mult:mac_mult3.datab[3]
datab[24] => alt_mac_mult:mac_mult3.datab[4]
datab[25] => alt_mac_mult:mac_mult3.datab[5]
datab[26] => alt_mac_mult:mac_mult3.datab[6]
datab[27] => alt_mac_mult:mac_mult3.datab[7]
datab[28] => alt_mac_mult:mac_mult3.datab[8]
datab[29] => alt_mac_mult:mac_mult3.datab[9]
result[0] <= alt_mac_out:mac_out4.dataout[0]
result[1] <= alt_mac_out:mac_out4.dataout[1]
result[2] <= alt_mac_out:mac_out4.dataout[2]
result[3] <= alt_mac_out:mac_out4.dataout[3]
result[4] <= alt_mac_out:mac_out4.dataout[4]
result[5] <= alt_mac_out:mac_out4.dataout[5]
result[6] <= alt_mac_out:mac_out4.dataout[6]
result[7] <= alt_mac_out:mac_out4.dataout[7]
result[8] <= alt_mac_out:mac_out4.dataout[8]
result[9] <= alt_mac_out:mac_out4.dataout[9]
result[10] <= alt_mac_out:mac_out4.dataout[10]
result[11] <= alt_mac_out:mac_out4.dataout[11]
result[12] <= alt_mac_out:mac_out4.dataout[12]
result[13] <= alt_mac_out:mac_out4.dataout[13]
result[14] <= alt_mac_out:mac_out4.dataout[14]
result[15] <= alt_mac_out:mac_out4.dataout[15]


|dds_sin|mul_6:mul|kk:u1|altmult_add:ALTMULT_ADD_component|mult_add_rh23:auto_generated|alt_mac_mult:mac_mult1
dataa[0] => dataa_n[0].DATAIN
dataa[1] => dataa_n[1].DATAIN
dataa[2] => dataa_n[2].DATAIN
dataa[3] => dataa_n[3].DATAIN
datab[0] => datab_n[0].DATAIN
datab[1] => datab_n[1].DATAIN
datab[2] => datab_n[2].DATAIN
datab[3] => datab_n[3].DATAIN
datab[4] => datab_n[4].DATAIN
datab[5] => datab_n[5].DATAIN
datab[6] => datab_n[6].DATAIN
datab[7] => datab_n[7].DATAIN
datab[8] => datab_n[8].DATAIN
datab[9] => datab_n[9].DATAIN
clk[0] => dataa_n[3].CLK
clk[0] => dataa_n[2].CLK
clk[0] => dataa_n[1].CLK
clk[0] => dataa_n[0].CLK
clk[0] => datab_n[9].CLK
clk[0] => datab_n[8].CLK
clk[0] => datab_n[7].CLK
clk[0] => datab_n[6].CLK
clk[0] => datab_n[5].CLK
clk[0] => datab_n[4].CLK
clk[0] => datab_n[3].CLK
clk[0] => datab_n[2].CLK
clk[0] => datab_n[1].CLK
clk[0] => datab_n[0].CLK
clk[0] => dataout_n[13].CLK
clk[0] => dataout_n[12].CLK
clk[0] => dataout_n[11].CLK
clk[0] => dataout_n[10].CLK
clk[0] => dataout_n[9].CLK
clk[0] => dataout_n[8].CLK
clk[0] => dataout_n[7].CLK
clk[0] => dataout_n[6].CLK
clk[0] => dataout_n[5].CLK
clk[0] => dataout_n[4].CLK
clk[0] => dataout_n[3].CLK
clk[0] => dataout_n[2].CLK
clk[0] => dataout_n[1].CLK
clk[0] => dataout_