📄 bsp.c
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* Arguments : none
*
* Returns ; none
*********************************************************************************************************
*/
#if OS_VIEW_MODULE > 0
void OSView_TmrInit (void)
{
T1PR = 0;
T1TCR = 0x00000001; /* Enable the timer */
}
#endif
/*
*********************************************************************************************************
* READ TIMER FOR uC/OS-View
*
* Description : This function is called to read the current counts of a 32 bit free running timer.
*
* Timer #0 of the LPC2000 is used. This is an UP-timer.
*
* Arguments : none
*
* Returns ; The 32 bit counts of the timer assuming the timer (MUST be an UP counter).
*********************************************************************************************************
*/
#if OS_VIEW_MODULE > 0
CPU_INT32U OSView_TmrRd (void)
{
if (OSRunning == DEF_TRUE) {
return ((CPU_INT32U)T1TC);
} else {
return (0);
}
}
#endif
/*
******************************************************************************************************************************
******************************************************************************************************************************
** uC/OS-II Timer Functions
******************************************************************************************************************************
******************************************************************************************************************************
*/
/*
*********************************************************************************************************
* TICKER INITIALIZATION
*
* Description : This function is called to initialize uC/OS-II's tick source (typically a timer generating
* interrupts every 1 to 100 mS).
*
* Arguments : none
*
* Note(s) : 1) The timer is setup for output compare mode BUT 'MUST' also 'freerun' so that the timer
* count goes from 0x00000000 to 0xFFFFFFFF to ALSO be able to read the free running count.
* The reason this is needed is because we use the free-running count in uC/OS-View.
*********************************************************************************************************
*/
static void Tmr_TickInit (void)
{
CPU_INT32U pclk_freq;
CPU_INT32U rld_cnts;
/* VIC timer #0 Initialization */
VICIntSelect &= ~(1 << VIC_TIMER0); /* Configure the timer interrupt as an IRQ source */
VICVectAddr4 = (CPU_INT32U)Tmr_TickISR_Handler; /* Set the vector address */
VICIntEnable = (1 << VIC_TIMER0); /* Enable the timer interrupt source */
pclk_freq = BSP_CPU_PclkFreq(PCLK_TIMER1); /* Get the peripheral clock frequency */
rld_cnts = pclk_freq / OS_TICKS_PER_SEC; /* Calculate the # of counts necessary for the OS ticker */
T0TCR = (1 << 1); /* Disable and reset counter 0 and the prescale counter 0 */
T0TCR = 0; /* Clear the reset bit */
T0PC = 0; /* Prescaler is set to no division */
T0MR0 = rld_cnts;
T0MCR = 3; /* Interrupt on MR0 (reset TC), stop TC */
T0CCR = 0; /* Capture is disabled. */
T0EMR = 0; /* No external match output. */
T0TCR = 1; /* Enable timer 0 */
}
/*
*********************************************************************************************************
* TIMER #0 IRQ HANDLER
*
* Description : This function handles the timer interrupt that is used to generate TICKs for uC/OS-II.
*
* Arguments : none
*
* Note(s) : 1) The timer is 'reloaded' with the count at compare + the time for the next interrupt.
* Since we are using 'unsigned' integer math, overflows are irrelevant.
*********************************************************************************************************
*/
void Tmr_TickISR_Handler (void)
{
T0IR = 0xFF; /* Clear timer #0 interrupt */
OSTimeTick(); /* Call uC/OS-II's OSTimeTick() */
}
/*
******************************************************************************************************************************
******************************************************************************************************************************
** Static Board Support Initialization Functions
******************************************************************************************************************************
******************************************************************************************************************************
*/
/*
*********************************************************************************************************
* Set the CPU Clock Frequency
*
* Description: This function sets up and activates the PLL
*
* Arguements : None
*
* Returns : None
*
* Notes : 1) The PLL output frequency is calculated by the following formula:
* Fcco = 2 * Fin * m / n, where Fin is the PLL input clock. In
* this particular case, Fin is set to the Main Oscillator
* whose frequency is #define'd in bsp.h. M is the PLL
* clock multiplier. M must be written to the PLLCFG register
* as the desired multiplier - 1. N is the PLL clock divider
* and must be written to PLLCFG as the desired divider - 1.
*
* 2) Fcco must be between 250 and 550 MHz. The ARM Core clock
* must never exceed 72 MHz. Use cClkDiv to divide Fcco accordingly.
*
* 3) When using the USB device, you must choose Fcco as a multiple
* of 96 MHz, and then use usbClkDiv to divide Fcco to exactly
* 48 MHz.
*
* 4) In this example, Fin = 12MHz, M = 12, N = 1, cClkDiv = 6 and usbClkDiv = 6.
* Therefore, Fcco = 2 * Fin * M / N = (2 * 12 * 12 / 1) = 288MHz.
* The processor clock = (Fcco / cClkDiv) = (288MHz / 6) = 48MHz.
* Finally, the USB clock = (Fcco / usbClkDib) = (288MHz / 6) = 48MHz.
*
* 5) Early revisions of the part have a PLL errata preventing Fcco from
* being greater than 288MHz.
*
* 6) For later revisions, M = 20, cCLKDiv = 8, and usbClkDiv = 10 yield
* 60MHz for the processor clock and 48MHz for the USB clock.
*********************************************************************************************************
*/
static void PLL_Init (void)
{
#if CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL /* Allocate storage for CPU status register */
CPU_SR cpu_sr = 0;
#endif
CPU_INT32U m;
CPU_INT32U n;
CPU_INT32U clk_div;
CPU_INT32U clk_div_usb;
m = 11; /* PLL Multiplier = 20, MSEL bits = 12 - 1 = 11 */
n = 0; /* PLL Divider = 1, NSEL bits = 1 - 1 = 0 */
clk_div = 3; /* Configure the ARM Core clock div to 6. CCLKSEL = 6 - 1 */
clk_div_usb = 5; /* Configure the USB clock divider to 6, USBSEL = 6 - 1 */
if ((PLLSTAT & (1 << 25)) > 0) { /* If the PLL is already running */
CPU_CRITICAL_ENTER();
PLLCON &= ~(1 << 1); /* Disconnect the PLL */
PLLFEED = 0xAA; /* PLL register update sequence, 0xAA, 0x55 */
PLLFEED = 0x55;
CPU_CRITICAL_EXIT();
}
CPU_CRITICAL_ENTER();
PLLCON &= ~(1 << 0); /* Disable the PLL */
PLLFEED = 0xAA; /* PLL register update sequence, 0xAA, 0x55 */
PLLFEED = 0x55;
CPU_CRITICAL_EXIT();
SCS &= ~(1 << 4); /* OSCRANGE = 0, Main OSC is between 1 and 20 Mhz */
SCS |= (1 << 5); /* OSCEN = 1, Enable the main oscillator */
while ((SCS & (1 << 6)) == 0) { /* Wait until OSCSTAT is set (Main OSC ready to be used) */
;
}
CLKSRCSEL = (1 << 0); /* Select main OSC, 12MHz, as the PLL clock source */
CPU_CRITICAL_ENTER();
PLLCFG = (m << 0) | (n << 16); /* Configure the PLL multiplier and divider */
PLLFEED = 0xAA; /* PLL register update sequence, 0xAA, 0x55 */
PLLFEED = 0x55;
CPU_CRITICAL_EXIT();
CPU_CRITICAL_ENTER();
PLLCON |= (1 << 0); /* Enable the PLL */
PLLFEED = 0xAA; /* PLL register update sequence, 0xAA, 0x55 */
PLLFEED = 0x55;
CPU_CRITICAL_EXIT();
CCLKCFG = clk_div; /* Configure the ARM Core Processor clock divider */
USBCLKCFG = clk_div_usb; /* Configure the USB clock divider */
while ((PLLSTAT & (1 << 26)) == 0) { /* Wait for PLOCK to become set */
;
}
PCLKSEL0 = 0xAAAAAAAA; /* Set peripheral clocks to be half of main clock */
PCLKSEL1 = 0x22AAA8AA;
CPU_CRITICAL_ENTER();
PLLCON |= (1 << 1); /* Connect the PLL. The PLL is now the active clock source */
PLLFEED = 0xAA; /* PLL register update sequence, 0xAA, 0x55 */
PLLFEED = 0x55;
CPU_CRITICAL_EXIT();
while ((PLLSTAT & (1 << 25)) == 0) { /* Wait PLLC, the PLL connect status bit to become set */
;
}
}
/*
*********************************************************************************************************
* MAM_Init()
*
* Description : This function initializes the Memory Acceleration Module
*
* Arguements : None
*
* Returns : None
*
* Notes : None
*********************************************************************************************************
*/
static void MAM_Init (void)
{
CPU_INT32U clk_freq;
clk_freq = BSP_CPU_ClkFreq(); /* Get the current core clock frequency */
MAMCR = 0; /* Disable MAM functionality */
if (clk_freq < 20000000) { /* Compare current clock frequency with MAM modes */
MAMTIM = 1; /* Set MAM fetch cycles to 1 processor clock in duration */
}
if (clk_freq < 40000000) {
MAMTIM = 2; /* Set MAM fetch cycles to 2 processor clock in duration */
}
if (clk_freq >= 40000000) {
MAMTIM = 3; /* Set MAM fetch cycles to 3 processor clock in duration */
}
MAMCR = 2; /* Enable full MAM functionality */
}
/*
*********************************************************************************************************
* INITIALIZE I/Os
*
* Description : This function initializes the GPIO pins. All the I/O pins are initialized in this function
* so you don't have to look at multiple places for I/O initialization.
*
* Arguements : None
*
* Returns : None
*
* Note(s) : 1) Refer to the LPC2378 User Manaul, Chapter 9 for a detailed Pin Assignment
* 2) The UARTS are connected as follows
* PO.2 UART0 Tx
* PO.3 UART0 Rx
* PO.15 UART1 Tx
* PO.16 UART1 Rx
*
* 3) The 2x16 LCD is connected as follows
*
* P1.24 D4 LCD Data 4 \
* P1.25 D5 LCD Data 5 |
* P1.26 D6 LCD Data 6 | 4-bit interface mode
* P1.27 D7 LCD Data 7 /
* P1.28 RS Register Select
* P1.29 R/W Read (H) / Write (L)
* P1.30 E Enable
*
* 3) The onboard LEDs are connected as follows
* P2[7:0] GPIO Port 2 Pins 7:0
*
* 4) The push button is connected as follows
* P2.10 GPIO Port 2.10
*********************************************************************************************************
*/
static void GPIO_Init (void)
{
SCS |= 1; /* Enable high-speed GPIO on ports 0 and 1 */
IO0DIR = 0;
IO1DIR = 0;
FIO0DIR = 0;
FIO1DIR = 0;
FIO2DIR = 0;
FIO3DIR = 0;
FIO4DIR = 0;
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