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<dd><div class="Indent"><a name="84745"> </a>When the most significant three bits of the virtual address are 101, the 2<sup>29</sup>-byte (512&nbsp;MB) kernel physical space labeled <b class="keyword">kseg1</b> is the virtual address space selected. References to <b class="keyword">kseg1</b> are not mapped through the TLB; the physical address selected is defined by subtracting 0xa000 0000 from the virtual address. Caches are always disabled for accesses to these addresses; physical memory or memory-mapped I/O device registers are accessed directly.</div>
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<h4 class="H4"><i><a name="84747">64-bit Support (R4000 Targets Only)</a></i></h4>
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<dd><p class="Body"><a name="84749"> </a>With VxWorks for MIPS, real-time applications have access to the MIPS R4000 64-bit registers. This lets applications perform 64-bit math for enhanced performance.</p>
<dd><p class="Body"><a name="84752"> </a>To specify 64-bit integers in C, declare them as <b class="keyword">long long</b>. Pointers, integers, and longs are 32-bit quantities in this release of VxWorks.<b></b></p>
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<h4 class="H4"><i><a name="84755">Memory Layout</a></i></h4>
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<dd><p class="Body"><a name="84759"> </a>The memory layout of the MIPS is shown in <a href="x-mips4.html#84955">Figure&nbsp;E-1</a>. The figure contains the following labels:<p class="table">

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<p class="BodyLeft"><a name="85039"> </a>Exception Vectors </p>

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<p class="BodyLeft"><a name="85041"> </a>Table of exception/interrupt vectors.</p>

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<p class="BodyLeft"><a name="85043"> </a>SM Anchor </p>

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<p class="BodyLeft"><a name="85045"> </a>Anchor for the shared memory network (if there is shared memory on the board).</p>

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<p class="BodyLeft"><a name="85047"> </a>Boot Line </p>

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<p class="BodyLeft"><a name="85049"> </a>ASCII string of boot parameters.</p>

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<p class="BodyLeft"><a name="85051"> </a>Exception Message </p>

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<p class="BodyLeft"><a name="85053"> </a>ASCII string of the fatal exception message.</p>

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<p class="BodyLeft"><a name="85055"> </a>Initial Stack </p>

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<p class="BodyLeft"><a name="85057"> </a>Initial stack for <b class="routine"><i class="routine">usrInit</i></b><b>(</b>&nbsp;<b>)</b>, until <b class="routine"><i class="routine">usrRoot</i></b><b>(</b>&nbsp;<b>)</b> gets allocated stack.</p>

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<p class="BodyLeft"><a name="85059"> </a>System Image </p>

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<p class="BodyLeft"><a name="85061"> </a>Entry point for VxWorks.</p>

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<p class="BodyLeft"><a name="85063"> </a>Host Memory Pool </p>

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<p class="BodyLeft"><a name="85065"> </a>Memory allocated by host tools. The size depends on the system image and is defined in the macro <b class="symbol_UC">WDB_POOL_SIZE</b>. Modify <b class="symbol_UC">WDB_POOL_SIZE</b> under <b class="symbol_UC">INCLUDE_WDB</b>.</p>

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<p class="BodyLeft"><a name="85067"> </a>Interrupt Stack </p>

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<p class="BodyLeft"><a name="85069"> </a>Size is defined by <b class="symbol_UC">ISR_STACK_SIZE</b> under <b class="symbol_UC">INCLUDE_KERNEL</b>. Location depends on system image size.</p>

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<p class="BodyLeft"><a name="85071"> </a>System Memory Pool </p>

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<p class="BodyLeft"><a name="85073"> </a>Size depends on size of system image and interrupt stack. The end of the free memory pool for this board is returned by <b class="routine"><i class="routine">sysMemTop</i></b><b>(</b>&nbsp;<b>)</b>.</p>

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<dd><p class="Body"><a name="84847"> </a>All addresses shown in <a href="x-mips4.html#84955">Figure&nbsp;E-1</a> depend on the start of memory for a particular target board. The start of memory is defined as <b class="symbol_UC">LOCAL_MEM_LOCAL_ADRS</b> under <b class="symbol_UC">INCLUDE_MEMORY_CONFIG</b> for each target.<div class="frame">
<h4 class="EntityTitle"><a name="84955"><font face="Helvetica, sans-serif" size="-1" class="sans">Figure E-1:&nbsp;&nbsp;VxWorks System Memory Layout (MIPS)</font></a></h4>

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<div class="Anchor"><a name="85015"> </a><img class="figure" border="0" src="images/x-mipsa.gif">
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<dd><p class="Body"><a name="79990"> </a></p>
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