ocr0.lst

单片机红外控制发射与接收,红外发射是一种常用的控制方式

__start:
__text_start:
    003A E5CF      LDI	R28,0x5F
    003B E0D4      LDI	R29,4
    003C BFCD      OUT	0x3D,R28
    003D BFDE      OUT	0x3E,R29
    003E 51C0      SUBI	R28,0x10
    003F 40D0      SBCI	R29,0
    0040 EA0A      LDI	R16,0xAA
    0041 8308      STD	Y+0,R16
    0042 2400      CLR	R0
    0043 E6E0      LDI	R30,0x60
    0044 E0F0      LDI	R31,0
    0045 E010      LDI	R17,0
    0046 36E0      CPI	R30,0x60
    0047 07F1      CPC	R31,R17
    0048 F011      BEQ	0x004B
    0049 9201      ST	R0,Z+
    004A CFFB      RJMP	0x0046
    004B 8300      STD	Z+0,R16
    004C E7E4      LDI	R30,0x74
    004D E0F0      LDI	R31,0
    004E E6A0      LDI	R26,0x60
    004F E0B0      LDI	R27,0
    0050 E010      LDI	R17,0
    0051 37E4      CPI	R30,0x74
    0052 07F1      CPC	R31,R17
    0053 F021      BEQ	0x0058
    0054 95C8      LPM
    0055 9631      ADIW	R30,1
    0056 920D      ST	R0,X+
    0057 CFF9      RJMP	0x0051
    0058 940E00C6  CALL	_main
_exit:
    005A CFFF      RJMP	_exit
FILE: C:\DOCUME~1\Administrator\桌面\新建文~1\OCR0\delay.h
(0001) #include <iom16v.h>
(0002) 
(0003) 
(0004) void delay_1us(void)             
(0005)   {
(0006)    asm("nop");
_delay_1us:
    005B 0000      NOP
    005C 9508      RET
_delay_nus:
  i                    --> R20
  n                    --> R22
    005D 940E0246  CALL	push_gset2
    005F 01B8      MOVW	R22,R16
(0007)   }
(0008) 
(0009) void delay_nus(unsigned int n)  
(0010)   {
(0011)    unsigned int i=0;
    0060 2744      CLR	R20
    0061 2755      CLR	R21
(0012)    for (i=0;i<n;i++)
    0062 C003      RJMP	0x0066
(0013)    delay_1us();
    0063 DFF7      RCALL	_delay_1us
    0064 5F4F      SUBI	R20,0xFF
    0065 4F5F      SBCI	R21,0xFF
    0066 1746      CP	R20,R22
    0067 0757      CPC	R21,R23
    0068 F3D0      BCS	0x0063
    0069 940E023A  CALL	pop_gset2
    006B 9508      RET
(0014)   }
(0015)   
(0016) void delay_1ms(void)         
(0017)   {
(0018)    unsigned int i;
(0019)    for (i=0;i<1140;i++);
_delay_1ms:
  i                    --> R16
    006C 2700      CLR	R16
    006D 2711      CLR	R17
    006E C002      RJMP	0x0071
    006F 5F0F      SUBI	R16,0xFF
    0070 4F1F      SBCI	R17,0xFF
    0071 3704      CPI	R16,0x74
    0072 E0E4      LDI	R30,4
    0073 071E      CPC	R17,R30
    0074 F3D0      BCS	0x006F
    0075 9508      RET
_delay:
  i                    --> R20
  n                    --> R22
    0076 940E0246  CALL	push_gset2
    0078 01B8      MOVW	R22,R16
(0020)   }
(0021)   
(0022) void delay(unsigned int n)   
(0023)   {
(0024)    unsigned int i=0;
    0079 2744      CLR	R20
    007A 2755      CLR	R21
(0025)    for (i=0;i<n;i++)
    007B C003      RJMP	0x007F
(0026)    delay_1ms();
    007C DFEF      RCALL	_delay_1ms
    007D 5F4F      SUBI	R20,0xFF
    007E 4F5F      SBCI	R21,0xFF
    007F 1746      CP	R20,R22
    0080 0757      CPC	R21,R23
    0081 F3D0      BCS	0x007C
    0082 940E023A  CALL	pop_gset2
    0084 9508      RET
FILE: C:\DOCUME~1\Administrator\桌面\新建文~1\OCR0\OCR0.c
(0001) //ICC-AVR application builder : 2007-5-16 1:38:35
(0002) // Target : M16
(0003) // Crystal: 8.0000Mhz
(0004) 
(0005) #include <iom16v.h>
(0006) #include <macros.h>
(0007) #include"delay.h"
(0008) 
(0009) void header(void)
(0010) {
(0011)                        PORTB=0x08;
_header:
    0085 E088      LDI	R24,0x8
    0086 BB88      OUT	0x18,R24
(0012) 	                   DDRB=0x08;
    0087 BB87      OUT	0x17,R24
(0013) 	                   delay_nus(5200);
    0088 E500      LDI	R16,0x50
    0089 E114      LDI	R17,0x14
    008A DFD2      RCALL	_delay_nus
(0014) 	                   DDRB=0x00;
    008B 2422      CLR	R2
    008C BA27      OUT	0x17,R2
(0015) 	                   delay_nus(2600); //header
    008D E208      LDI	R16,0x28
    008E E01A      LDI	R17,0xA
    008F DFCD      RCALL	_delay_nus
    0090 9508      RET
(0016) }
(0017) void data_1(void)
(0018) {
(0019)                        DDRB=0x08;
_data_1:
    0091 E088      LDI	R24,0x8
    0092 BB87      OUT	0x17,R24
(0020) 	                   delay_nus(310);
    0093 E306      LDI	R16,0x36
    0094 E011      LDI	R17,1
    0095 DFC7      RCALL	_delay_nus
(0021) 	                   DDRB=0x00;
    0096 2422      CLR	R2
    0097 BA27      OUT	0x17,R2
(0022) 	                   delay_nus(640); 
    0098 E800      LDI	R16,0x80
    0099 E012      LDI	R17,2
    009A DFC2      RCALL	_delay_nus
    009B 9508      RET
(0023) }
(0024) void data_0(void)
(0025) {
(0026)                        DDRB=0x08;
_data_0:
    009C E088      LDI	R24,0x8
    009D BB87      OUT	0x17,R24
(0027) 	                   delay_nus(310);
    009E E306      LDI	R16,0x36
    009F E011      LDI	R17,1
    00A0 DFBC      RCALL	_delay_nus
(0028) 	                   DDRB=0x00;
    00A1 2422      CLR	R2
    00A2 BA27      OUT	0x17,R2
(0029) 	                   delay_nus(320); 
    00A3 E400      LDI	R16,0x40
    00A4 E011      LDI	R17,1
    00A5 DFB7      RCALL	_delay_nus
    00A6 9508      RET
(0030) }
(0031) void end(void)
(0032) {
(0033)                        DDRB=0x08;
_end:
    00A7 E088      LDI	R24,0x8
    00A8 BB87      OUT	0x17,R24
(0034) 	                   delay_nus(310);
    00A9 E306      LDI	R16,0x36
    00AA E011      LDI	R17,1
    00AB DFB1      RCALL	_delay_nus
(0035) 	                   DDRB=0x00;
    00AC 2422      CLR	R2
    00AD BA27      OUT	0x17,R2
(0036) 	                   delay_nus(640); 
    00AE E800      LDI	R16,0x80
    00AF E012      LDI	R17,2
    00B0 DFAC      RCALL	_delay_nus
    00B1 9508      RET
(0037) }
(0038) 
(0039) void port_init(void)
(0040) {
(0041)  PORTA = 0x00;
_port_init:
    00B2 2422      CLR	R2
    00B3 BA2B      OUT	0x1B,R2
(0042)  DDRA  = 0x00;
    00B4 BA2A      OUT	0x1A,R2
(0043)  PORTB = 0x00;
    00B5 BA28      OUT	0x18,R2
(0044)  DDRB  = 0x00;
    00B6 BA27      OUT	0x17,R2
(0045)   PORTC=0xff; 
    00B7 EF8F      LDI	R24,0xFF
    00B8 BB85      OUT	0x15,R24
(0046)   DDRC=0x0f;
    00B9 E08F      LDI	R24,0xF
    00BA BB84      OUT	0x14,R24
(0047)  //PORTC = 0x00; //m103 output only
(0048)  //DDRC  = 0x00;
(0049)  PORTD = 0x00;
    00BB BA22      OUT	0x12,R2
(0050)  DDRD  = 0x00;
    00BC BA21      OUT	0x11,R2
    00BD 9508      RET
(0051) }
(0052) //-----------------------timer0----------------//
(0053) //TIMER0 initialize - prescale:8
(0054) // WGM: CTC
(0055) // desired value: 39KHz
(0056) // actual value: 38.462KHz (-1.4%)
(0057) void timer0_init(void)
(0058) {
(0059)  TCCR0 = 0x00; //stop
_timer0_init:
    00BE 2422      CLR	R2
    00BF BE23      OUT	0x33,R2
(0060)  TCNT0 = 0x00; //set count
    00C0 BE22      OUT	0x32,R2
(0061)  OCR0  = 0x0C;  //set compare
    00C1 E08C      LDI	R24,0xC
    00C2 BF8C      OUT	0x3C,R24
(0062)  TCCR0 = 0x1A; //start timer
    00C3 E18A      LDI	R24,0x1A
    00C4 BF83      OUT	0x33,R24
    00C5 9508      RET
(0063) }
(0064) //-------------------------timer1-----------//
(0065) 
(0066) 
(0067) 
(0068) 
(0069) //call this routine to initialize all peripherals
(0070) void main(void)
(0071) {
(0072)  unsigned char abc;
(0073)  
(0074)  unsigned char keyval1,keyval2;
(0075)  unsigned char i=0;
_main:
  abc                  --> Y+1
  i                    --> R20
  keyval1              --> R22
  keyval2              --> R10
    00C6 2744      CLR	R20
(0076)  //abc=EEPROM_read(0x14);
(0077)  //delay_1us();
(0078)  //OSCCAL=abc;
(0079)  //stop errant interrupts until set up
(0080)  CLI(); //disable all interrupts
    00C7 94F8      BCLR	7
(0081)  port_init();
    00C8 DFE9      RCALL	_port_init
(0082)  timer0_init();
    00C9 DFF4      RCALL	_timer0_init
(0083)  //timer1_init();
(0084)  
(0085)  MCUCR = 0x00;
    00CA 2422      CLR	R2
    00CB BE25      OUT	0x35,R2
(0086)  GICR  = 0x00;
    00CC BE2B      OUT	0x3B,R2
(0087)  TIMSK = 0x00; //timer interrupt sources
    00CD BE29      OUT	0x39,R2
(0088)  SEI(); //re-enable interrupts
    00CE 9478      BSET	7
    00CF C0D3      RJMP	0x01A3
(0089)  //all peripherals are now initialized
(0090)  while(1)
(0091)     {
(0092) 	//PORTB=0x00;
(0093) 	//DDRB=0x08;
(0094) 	scan_key();
    00D0 D0D4      RCALL	_scan_key
(0095) 	keyval1=scan_key();
    00D1 D0D3      RCALL	_scan_key
    00D2 2F60      MOV	R22,R16
(0096)      if (keyval1!=0x7f)
    00D3 370F      CPI	R16,0x7F
    00D4 F021      BEQ	0x00D9
(0097)         {
(0098)          do
(0099)             {
(0100)              keyval2=scan_key();
    00D5 D0CF      RCALL	_scan_key
    00D6 2EA0      MOV	R10,R16
(0101)             }
(0102)           while (keyval1==keyval2);
    00D7 156A      CP	R22,R10
    00D8 F3E1      BEQ	0x00D5
(0103)         }
(0104)      switch(keyval1)   
    00D9 2F46      MOV	R20,R22
    00DA 2755      CLR	R21
    00DB 3040      CPI	R20,0
    00DC E0E0      LDI	R30,0
    00DD 075E      CPC	R21,R30
    00DE F40C      BGE	0x00E0
    00DF C0C3      RJMP	0x01A3
    00E0 E08F      LDI	R24,0xF
    00E1 E090      LDI	R25,0
    00E2 1784      CP	R24,R20
    00E3 0795      CPC	R25,R21
    00E4 F40C      BGE	0x00E6
    00E5 C0BD      RJMP	0x01A3
    00E6 E002      LDI	R16,2
    00E7 E010      LDI	R17,0
    00E8 019A      MOVW	R18,R20
    00E9 940E022A  CALL	empy16s
    00EB 01F8      MOVW	R30,R16
    00EC E584      LDI	R24,0x54
    00ED E090      LDI	R25,0
    00EE 0FE8      ADD	R30,R24
    00EF 1FF9      ADC	R31,R25
    00F0 9005      LPM	R0,Z+
    00F1 9014      LPM	R1,0(Z)
    00F2 01F0      MOVW	R30,R0
    00F3 9409      IJMP
(0105)          {  
(0106)             case 1:  //PORTB=0x01;
(0107) 			           header();
    00F4 DF90      RCALL	_header
(0108) 					   data_1();
    00F5 DF9B      RCALL	_data_1
(0109) 					   data_0();
    00F6 DFA5      RCALL	_data_0
(0110) 					   data_0();
    00F7 DFA4      RCALL	_data_0
(0111) 					   data_0();
    00F8 DFA3      RCALL	_data_0
(0112) 					   data_0();
    00F9 DFA2      RCALL	_data_0
(0113) 					   data_0();
    00FA DFA1      RCALL	_data_0
(0114) 					   data_0();
    00FB DFA0      RCALL	_data_0
(0115) 					   data_0();
    00FC DF9F      RCALL	_data_0
(0116) 					   end();
    00FD DFA9      RCALL	_end
(0117) 			           
(0118) 				   break;
    00FE C0A4      RJMP	0x01A3
(0119) 				   
(0120)             case 2:  //PORTB=0x02;
(0121) 			          header();
    00FF DF85      RCALL	_header
(0122) 					  
(0123) 					  data_0();
    0100 DF9B      RCALL	_data_0
(0124) 					  data_1();
    0101 DF8F      RCALL	_data_1
(0125) 					  data_0();
    0102 DF99      RCALL	_data_0
(0126) 					  data_0();
    0103 DF98      RCALL	_data_0
(0127) 					  data_0();
    0104 DF97      RCALL	_data_0
(0128) 					  data_0();
    0105 DF96      RCALL	_data_0
(0129) 					  data_0();
    0106 DF95      RCALL	_data_0
(0130) 					  data_0();
    0107 DF94      RCALL	_data_0
(0131) 					  end();
    0108 DF9E      RCALL	_end
(0132) 	                   
(0133) 			          break;
    0109 C099      RJMP	0x01A3
(0134)             case 3:  //PORTB=0x03; 
(0135) 			          header();
    010A DF7A      RCALL	_header
(0136) 					  data_1();
    010B DF85      RCALL	_data_1
(0137) 					  data_1();
    010C DF84      RCALL	_data_1
(0138) 					  data_0();
    010D DF8E      RCALL	_data_0
(0139) 					  data_0();
    010E DF8D      RCALL	_data_0
(0140) 					  data_0();
    010F DF8C      RCALL	_data_0
(0141) 					  data_0();
    0110 DF8B      RCALL	_data_0
(0142) 					  data_0();
    0111 DF8A      RCALL	_data_0
(0143) 					  data_0();
    0112 DF89      RCALL	_data_0
(0144) 					  end();
    0113 DF93      RCALL	_end
(0145) 			              break; 
    0114 C08E      RJMP	0x01A3
(0146)             case 4:  //PORTB=0x04;
(0147) 			          header();
    0115 DF6F      RCALL	_header
(0148) 					  data_0();
    0116 DF85      RCALL	_data_0
(0149) 					  data_0();
    0117 DF84      RCALL	_data_0
(0150) 					  data_1();
    0118 DF78      RCALL	_data_1
(0151) 					  data_0();
    0119 DF82      RCALL	_data_0
(0152) 					  data_0();
    011A DF81      RCALL	_data_0
(0153) 					  data_0();
    011B DF80      RCALL	_data_0
(0154) 					  data_0();
    011C DF7F      RCALL	_data_0
(0155) 					  data_0();
    011D DF7E      RCALL	_data_0
(0156) 					  end();
    011E DF88      RCALL	_end
(0157) 			       break;
    011F C083      RJMP	0x01A3
(0158)             case 5:  //PORTB=0x05;
(0159) 			          header();
    0120 DF64      RCALL	_header
(0160) 					  data_1();
    0121 DF6F      RCALL	_data_1
(0161) 					  data_0();
    0122 DF79      RCALL	_data_0
(0162) 					  data_1();
    0123 DF6D      RCALL	_data_1
(0163) 					  data_0();
    0124 DF77      RCALL	_data_0
(0164) 					  data_0();
    0125 DF76      RCALL	_data_0
(0165) 					  data_0();
    0126 DF75      RCALL	_data_0
(0166) 					  data_0();
    0127 DF74      RCALL	_data_0
(0167) 					  data_0();
    0128 DF73      RCALL	_data_0
(0168) 					  end();
    0129 DF7D      RCALL	_end
(0169) 			       break;
    012A C078      RJMP	0x01A3
(0170)             case 6:  //PORTB=0x06;
(0171) 			          header();
    012B DF59      RCALL	_header
(0172) 					  data_0();
    012C DF6F      RCALL	_data_0
(0173) 					  data_1();
    012D DF63      RCALL	_data_1
(0174) 					  data_1();
    012E DF62      RCALL	_data_1
(0175) 					  data_0();
    012F DF6C      RCALL	_data_0
(0176) 					  data_0();
    0130 DF6B      RCALL	_data_0
(0177) 					  data_0();
    0131 DF6A      RCALL	_data_0
(0178) 					  data_0();
    0132 DF69      RCALL	_data_0
(0179) 					  data_0();
    0133 DF68      RCALL	_data_0
(0180) 					  end();
    0134 DF72      RCALL	_end
(0181) 			       break;
    0135 C06D      RJMP	0x01A3
(0182)             case 7:  //PORTB=0x07;
(0183) 			          header();
    0136 DF4E      RCALL	_header
(0184) 					  data_1();
    0137 DF59      RCALL	_data_1
(0185) 					  data_1();
    0138 DF58      RCALL	_data_1
(0186) 					  data_1();
    0139 DF57      RCALL	_data_1
(0187) 					  data_0();
    013A DF61      RCALL	_data_0
(0188) 					  data_0();
    013B DF60      RCALL	_data_0