📄 hal_ka_sc_auto.h
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#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_LSB 4#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_MASK 0x00000008#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_SHIFT 3#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_MSB 3#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_LSB 3#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_MASK 0x00000007#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_SHIFT 0#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_MSB 2#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_LSB 0#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_CORE_CLK_COUNT */#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK 0x02000000#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT 25#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB 25#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB 25#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK 0x01000000#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT 24#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB 24#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB 24#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_MASK 0x00ffffff#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_SHIFT 0#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_MSB 23#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_LSB 0#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_DR_CLK_COUNT */#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK 0x02000000#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT 25#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB 25#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB 25#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK 0x01000000#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT 24#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB 24#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB 24#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_MASK 0x00ffffff#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_SHIFT 0#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_MSB 23#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_LSB 0#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_SPI_CLK_COUNT */#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK 0x02000000#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT 25#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB 25#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB 25#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK 0x01000000#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT 24#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB 24#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB 24#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_MASK 0x00ffffff#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_SHIFT 0#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_MSB 23#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_LSB 0#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_BRD_BRD_OUT_DATA */#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_MASK 0x001fffff#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_SHIFT 0#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_MSB 20#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_LSB 0#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_BRD_BRD_OUT_ENABLE */#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_MASK 0x001fffff#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_SHIFT 0#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_MSB 20#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_LSB 0#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_BRD_BRD_IN */#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_MASK 0x001fffff#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_SHIFT 0#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_MSB 20#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_LSB 0#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_MISC */#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_MASK 0x00000002#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_SHIFT 1#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_MSB 1#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_LSB 1#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_MASK 0x00000001#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_SHIFT 0#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_MSB 0#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_LSB 0#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_INTERRUPT */#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_MASK 0x00000010#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_SHIFT 4#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_MSB 4#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_LSB 4#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_MASK 0x00000008#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_SHIFT 3#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_MSB 3#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_LSB 3#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_MASK 0x00000004#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_SHIFT 2#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_MSB 2#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_LSB 2#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_MASK 0x00000002#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_SHIFT 1#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_MSB 1#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_LSB 1#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_DEFAULT 0x00000000#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_MASK 0x00000001#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_SHIFT 0#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_MSB 0#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_LSB 0#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_TYPE (SAND_HAL_TYPE_READ)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_INTERRUPT_MASK */#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_MASK 0x00000010#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_SHIFT 4#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_MSB 4#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_LSB 4#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_DEFAULT 0x00000001#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_MASK 0x00000008#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_SHIFT 3#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_MSB 3#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_LSB 3#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_DEFAULT 0x00000001#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_MASK 0x00000004#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_SHIFT 2#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_MSB 2#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_LSB 2#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_DEFAULT 0x00000001#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_MASK 0x00000002#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_SHIFT 1#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_MSB 1#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_LSB 1#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_DEFAULT 0x00000001#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_MASK 0x00000001#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_SHIFT 0#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_MSB 0#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_LSB 0#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_DEFAULT 0x00000001/* ================================================================ * Field info for register KA_SC_SCAN_SCRATCH */#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_MASK 0xffffffff#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_SHIFT 0#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_MSB 31#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_LSB 0#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_DEFAULT 0x00000000/* ================================================================ * Field info for register KA_SC_SCAN_SCRATCH_MASK */#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_MASK 0xffffffff#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_SHIFT 0#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_MSB 31#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_LSB 0#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_TYPE (SAND_HAL_TYPE_WRITE)#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_DEFAULT 0xffffffff#endif /* matches #ifndef HAL_KA_SC_AUTO_H */⌨️ 快捷键说明
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