time_cnt_tb.tbw

ise9.1官方的使用手册中配套用的fpga入门代码

version 3
C:/examples/wtut_ver/wtut_ver_completed/time_cnt.v
time_cnt
VERILOG
VERILOG
C:/examples/wtut_ver/wtut_ver_completed/time_cnt_tb.xwv
Clocked
-
-
3000000000
ns
GSR:true
PRLD:false
100000000
CLOCK_LIST_BEGIN
clk
10000000
10000000
5000000
5000000
0
RISING
CLOCK_LIST_END
SIGNAL_LIST_BEGIN
ce
clk
clr
clk
hundredths
clk
load
clk
minutes
clk
q
clk
sec_lsb
clk
sec_msb
clk
tenths
clk
up
clk
SIGNAL_LIST_END
SIGNALS_NOT_ON_DISPLAY
hundredths_DIFF
minutes_DIFF
sec_lsb_DIFF
sec_msb_DIFF
tenths_DIFF
SIGNALS_NOT_ON_DISPLAY_END
MARKER_LIST_BEGIN
MARKER_LIST_END
MEASURE_LIST_BEGIN
MEASURE_LIST_END
SIGNAL_ORDER_BEGIN
clk
ce
clr
load
up
q
hundredths
minutes
sec_lsb
sec_msb
tenths
SIGNAL_ORDER_END
DIFFERENTIAL_CLKS_BEGIN
DIFFERENTIAL_CLKS_END
DIVIDERS_BEGIN
DIVIDERS_END