mainbak.c

arm 2410上的hdlc server 通信程序

#include "stdafx.h"
#include "2410addr.h"
 
#include <stdio.h>
 #define HDLC0_BASE 0xa8000000//0xe02000   /*****pcm1 hdlc0 hw9 ts16,TS=0x130*****/
 #define HDLC1_BASE 0xa8000100//0xe03000   /*****pcm0 hdlc1 hw8 ts16,TS=0x110*****/
 #define IDLE  0
 #define	MAX_OF_HDLC_LENGTH	128
 #define FIFO_STATUS              0     //FIFO_Status   0
 #define FIFO_DATA                1     //Receive_Data  Write  
 #define FIFO_CONTROL             2     //Control  Write 
 #define FIFO_ADDRESS             3     //Receive_Address  Write
 #define FIFO_CHANNEL_CONTROL     4     //Channel Control (Transmit)  Write
 #define FIFO_TIMING_CONTROL      5     //Timing Control  Write
 #define FIFO_INTERRUPT_FLAG      6     //Interrupt Flag  Write
 #define FIFO_INTERRUPT_ENABLE    7     //Interrupt Enable  Write
 #define FIFO_GENERAL_STATUS      8     //General Status  8
 #define FIFO_CHANNEL_STATUS      9     //C-Channel Status (Receive)  9 
 
 
  struct HDLC_BASE
{	unsigned char *addr ;
	unsigned char status ;
	unsigned char Int_clr ;
	unsigned int Tx_buff[128] ;
        unsigned int Rx_buff[1028] ;
	unsigned int T_Length ;
	unsigned int R_Length ;
}BHDLC[2];

  void dclk_init()
{
	int temp,temp1;
  temp=rMISCCR;
  temp1=rGPHCON;
  rGPHCON=rGPHCON & 0xffff;
  rGPHCON=rGPHCON | 0x280000;
  rMISCCR=rMISCCR & 0xfff8f;
  rMISCCR=rMISCCR | 0x50;

  temp1=rDCLKCON;
rDCLKCON=rDCLKCON & 0x0f;
rDCLKCON=rDCLKCON |  0x5b1;

temp=rBWSCON;
rBWSCON=rBWSCON & 0xff00ffff;
}
void init_8052(void)
{
	int i;
	unsigned char status;
BHDLC[0].addr = (unsigned char *)HDLC0_BASE ;
BHDLC[1].addr = (unsigned char *)HDLC1_BASE ;
BHDLC[0].status = IDLE ;
BHDLC[1].status = IDLE ;	
//D7  D6 D5   D4   D3  D2  D1  D0
//RST IC C1EN BRCK TC3 TC2 TC1 TC0
//1   0  0    0    0   0   0   0
*(BHDLC[0].addr + FIFO_TIMING_CONTROL)=0x80;
	for (i=0 ; i<255 ; i++) ;
*(BHDLC[0].addr + FIFO_TIMING_CONTROL)=0x00;
//D7   D6   D5   D4    D3    D2    D1 D0
//TxEN RxEN RxAD RA6/7 IFTF1 IFTF0 FA EOP
//0    0    0    0     0      0    0  0
//*(BHDLC[0].addr + FIFO_CONTROL)=0x00;	
//D7  D6 D5   D4   D3  D2  D1  D0
//RST IC C1EN BRCK TC3 TC2 TC1 TC0
//0   1  0    0    1   0   1   1
*(BHDLC[0].addr + FIFO_TIMING_CONTROL)=0x00;	
//D7   D6   D5   D4    D3    D2    D1 D0
//TxEN RxEN RxAD RA6/7 IFTF1 IFTF0 FA EOP
//1     1    0    0    0      1    0  0
*(BHDLC[0].addr + FIFO_CONTROL)=0xc4;
//*(BHDLC[0].addr + FIFO_INTERRUPT_ENABLE)=0x00;//0x40;	//EOPD interrupt enable

}

UCHAR write_HS_buf(unsigned int para[],unsigned int ch_num)
{
	unsigned int i ;unsigned char status;
	
  if (para[0] > MAX_OF_HDLC_LENGTH)
	  {
	   return (para[0]) ;
	  }
	else
	{
      status =*(BHDLC[0].addr+FIFO_STATUS);
	  *(BHDLC[0].addr + FIFO_DATA)=(unsigned char)para[1];	
		for (i=1 ; i < para[0]-1  ; i++)
		{
			*(BHDLC[0].addr + FIFO_DATA)=(unsigned char)para[i+1];	
		}
	  *(BHDLC[0].addr + FIFO_CONTROL)=*(BHDLC[0].addr + FIFO_CONTROL) | 0x1;	
 	  *(BHDLC[0].addr + FIFO_DATA)=(unsigned char)para[i+1];	
      *(BHDLC[0].addr + FIFO_CONTROL)=*(BHDLC[0].addr + FIFO_CONTROL) | 0x80;
	}		
	return  0;
}

void Jud_HDLC_Int_Status(void)
{
 unsigned char fifo_status[2],interrupt_flag[2], STATUS;
 unsigned char ctrl1,i,ff,tem,para[10];
 int len=0;
 //*(BHDLC[0].addr + FIFO_CONTROL)=*(BHDLC[0].addr + FIFO_CONTROL) | 0x40; 
 for (i=0 ; i < 128; i++)   
	 BHDLC[0].Rx_buff[i]=0 ;
 fifo_status[0] =*(BHDLC[0].addr+FIFO_STATUS); 
 *(BHDLC[0].addr + FIFO_CONTROL)=*(BHDLC[0].addr + FIFO_CONTROL) | 0x40; 
while (1)    		
 {
  if/*(((fifo_status[0] & 0x80)==0) && ((fifo_status[0] & 0x30)!=0))*/((fifo_status[0] & 0x30)!=0)
	   {
	   	BHDLC[0].Rx_buff[len]= *(BHDLC[0].addr + FIFO_DATA ) ;
        len++;
   }else
  if((fifo_status[0] & 0xc0)==0xc0)//bad
	   {
	     ff=*(BHDLC[0].addr + FIFO_DATA ) ;
	   }else
  if ((fifo_status[0] & 0x80)==0x80)//good
	   {
	     ff=*(BHDLC[0].addr + FIFO_DATA ) ;
	   }else	
  if ((fifo_status[0] & 0x40)==0x40)//First Byte
	   {
  	BHDLC[0].Rx_buff[len]= *(BHDLC[0].addr + FIFO_DATA ) ;
        len++;
	   }
	   fifo_status[0] =*(BHDLC[0].addr+FIFO_STATUS) ; 
	  
 }	
ff=0;	 
}	

search_bad_field (unsigned char i)
{
 unsigned int nLen;
 unsigned int para[128];
 unsigned char status ,yy;
*(BHDLC[0].addr + FIFO_CONTROL)=*(BHDLC[0].addr + FIFO_CONTROL) | 0x40; 
  status = *(BHDLC[i].addr+FIFO_STATUS) ;
 yy=status & 0x30;
  while (yy ==0x00) //bad
  {
     para[0] = *(BHDLC[i].addr + FIFO_DATA ) ;
     status = *(BHDLC[i].addr+FIFO_STATUS) ;
	 yy=status & 0x30;
  }
}

search_one_field( unsigned char ch_num)
{
 USHORT i,nlen;
 unsigned int paraR[128];
 unsigned char status ;
  for (i=0 ; i < 128; i++)   
	 BHDLC[0].Rx_buff[i]=0 ;
//*(BHDLC[0].addr + FIFO_CONTROL)=*(BHDLC[0].addr + FIFO_CONTROL) | 0x40; 
  status = *( unsigned char*)(BHDLC[0].addr+FIFO_STATUS) ;
  nlen = 0 ;
  while (((status & 0x80)==0) && ((status & 0x30)!=0))
  {
     BHDLC[0].Rx_buff[nlen] = *(BHDLC[0].addr+FIFO_DATA) ;
     nlen++;
     status = *(BHDLC[0].addr+FIFO_STATUS) ;	 
  }
  if((status & 0xc0)==0x80)//good
   {
     BHDLC[0].Rx_buff[nlen] = *(BHDLC[0].addr+FIFO_DATA) ;
     {
	 
	 }
   }
  else
  {
    BHDLC[0].Rx_buff[nlen] = *(BHDLC[0].addr+FIFO_DATA) ;
  }
  return;
}

int WINAPI WinMain(	HINSTANCE hInstance,
					HINSTANCE hPrevInstance,
					LPTSTR    lpCmdLine,
					int       nCmdShow)
{unsigned int ch[]={18,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18};
dclk_init();
 init_8052();
 while(1)
 {
  write_HS_buf(ch,0);
  Sleep(1);
   Jud_HDLC_Int_Status();
  Sleep(1);
 }return 0;


}