lld_bdsxxx_asp.c

Spansion 公司(原AMD flash 部门 / 富士通 闪存部门) FLASH 访问的参考函数

      while (lld_PpbProtectSector(i) != PPB_PROTECTED);
    }
    psg++;
  }
*/

  /* Write command Sequence */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);       /* *(xxx555) = 0xAA */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);       /* *(xxx2AA) = 0x55 */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_PPB_SETUP_CMD); /* *(xxx2AA) = 0x60 */

  while ((plscnt++ < 25) && (retval != PPB_UNPROTECTED) )
  {
    FLASH_WR(base_addr, 2, LLD_PUV7_PPB_SETUP_CMD);              /* *(xxx002) = 0x60 */
    DelayMilliseconds(15);                                       /* datasheet p. 22 */

    FLASH_WR(base_addr, 2, LLD_PUV7_PPB_ERASE_VER_CMD);          /* *(xxx002) = 0x40 */
    retval  = (FLASH_RD(base_addr, 2) ); /* return verify information (if non-zero do lld_PpbUnProtectSector again) */

  }

  /* Exit Mode */
  FLASH_WR(base_addr, 0, NOR_RESET_CMD);
  return(retval);
}

/*
*
*
*
*
*/
void PPB_LockBitSet
(
FLASHDATA * base_addr
)
{
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_PPB_LOCK_BIT_SET_CMD);
  FLASH_WR(base_addr, 0x00, NOR_RESET_CMD); /* go back to read array mode */
}

/*
*
*
*
*
*/
FLASHDATA PPB_LockBitStatus
(
FLASHDATA * base_addr
)
{
  FLASHDATA retval;

  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_PPB_LOCK_BIT_STATUS_CMD);
  retval = ( (FLASH_RD(base_addr, 0) & (LLD_DEV_DQ1_MASK)) >> 1 );
  FLASH_WR(base_addr, 0x00, NOR_RESET_CMD); /* go back to read array mode */

  return(retval);
}

/*
*
*
*
*
*/
void DYB_Write
(
FLASHDATA * base_addr,
ADDRESS   offset
)
{
  /* Write command Sequence */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_DYB_WRITE_CMD);
  FLASH_WR(base_addr, offset, LLD_PUV7_DYB_WRITE_DATA);

  /* Exit Mode */

  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);
  FLASH_WR(base_addr, offset + LLD_UNLOCK_ADDR1, NOR_AUTOSELECT_CMD);
  FLASH_WR(base_addr, 0, NOR_RESET_CMD);
}

/*
*
*
*
*
*/
void DYB_Erase
(
FLASHDATA * base_addr,
ADDRESS   offset
)
{
  /* Write command Sequence */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_DYB_ERASE_CMD);
  FLASH_WR(base_addr, offset, LLD_PUV7_DYB_ERASE_DATA);

  /* Exit Mode */

  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);
  FLASH_WR(base_addr, offset + LLD_UNLOCK_ADDR1, NOR_AUTOSELECT_CMD);
  FLASH_WR(base_addr, 0, NOR_RESET_CMD);
}

/*
*
*
*
*
*/
FLASHDATA DYB_Status
(
FLASHDATA * base_addr,
ADDRESS   offset
)
{
  FLASHDATA data;

  /* Write command Sequence */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);
  FLASH_WR(base_addr, offset + LLD_UNLOCK_ADDR1, LLD_PUV7_DYB_STATUS_CMD);
  data = FLASH_RD(base_addr, offset);

  /* Exit Mode */

  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);
  FLASH_WR(base_addr, offset + LLD_UNLOCK_ADDR1, NOR_AUTOSELECT_CMD);
  FLASH_WR(base_addr, 0, NOR_RESET_CMD);

  return(data);
}

/*
*
*
*
*
*/
FLASHDATA lld_PasswordProtectionModeLockingBitProgram
(
FLASHDATA * base_addr
)
{
  FLASHDATA retval = 0;
  int plscnt = 0;

  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);                    /*  */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);                    /*  */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_SECSI_SEC_LOCK_SETUP_CMD);   /*  */

  while ( (retval != LLD_DEV_DQ0_MASK) && (plscnt++ < 1000) )
  {
    FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_CMD);         /*  */
    DelayMicroseconds(150);
    FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_PGM_VER_CMD); /*  */
    retval = ( FLASH_RD(base_addr, LLD_PUV7_PL_ADDR) & LLD_DEV_DQ0_MASK );      /*  */
  }

  /* extra pulses for margin, recommended by factory */

  FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_CMD);         /*  */
  DelayMicroseconds(150);                                                                       /*  */
  FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_PGM_VER_CMD); /*  */
  retval = ( FLASH_RD(base_addr, LLD_PUV7_PL_ADDR) & LLD_DEV_DQ0_MASK );      /*  */

  FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_CMD);         /*  */
  DelayMicroseconds(150);                                                                       /*  */
  FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_PGM_VER_CMD); /*  */
  retval = ( FLASH_RD(base_addr, LLD_PUV7_PL_ADDR) & LLD_DEV_DQ0_MASK );      /*  */

  FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_CMD);         /*  */
  DelayMicroseconds(150);                                                                       /*  */
  FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_PGM_VER_CMD); /*  */
  retval = ( FLASH_RD(base_addr, LLD_PUV7_PL_ADDR) & LLD_DEV_DQ0_MASK );      /*  */

  FLASH_WR(base_addr, 0x00, NOR_RESET_CMD); /* go back to read array mode */

  return(retval);
}

/*
*
*
*
*
*/
FLASHDATA lld_PersistentProtectionModeLockingBitProgram
(
FLASHDATA * base_addr
)
{
  FLASHDATA retval = 0;
  int plscnt = 0;

  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);                    /*  */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);                    /*  */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_SECSI_SEC_LOCK_SETUP_CMD);   /*  */

  while ( (retval != LLD_DEV_DQ0_MASK) && (plscnt++ < 1000) )
  {
    FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_CMD);         /*  */
    DelayMicroseconds(150);
    FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_PGM_VER_CMD); /*  */
    retval = ( FLASH_RD(base_addr, LLD_PUV7_SL_ADDR) & LLD_DEV_DQ0_MASK );      /*  */
  }

  /* extra pulses for margin, recommended by factory */

  FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_CMD);         /*  */
  DelayMicroseconds(150);
  FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_PGM_VER_CMD); /*  */
  retval = ( FLASH_RD(base_addr, LLD_PUV7_SL_ADDR) & LLD_DEV_DQ0_MASK );      /*  */

  FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_CMD);         /*  */
  DelayMicroseconds(150);
  FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_PGM_VER_CMD); /*  */
  retval = ( FLASH_RD(base_addr, LLD_PUV7_SL_ADDR) & LLD_DEV_DQ0_MASK );      /*  */

  FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_CMD);         /*  */
  DelayMicroseconds(150);
  FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_SECSI_SEC_LOCK_PGM_VER_CMD); /*  */
  retval = ( FLASH_RD(base_addr, LLD_PUV7_SL_ADDR) & LLD_DEV_DQ0_MASK );      /*  */

  FLASH_WR(base_addr, 0x00, NOR_RESET_CMD); /* go back to read array mode */

  return(retval);
}

/*
*
*
*
*
*/
FLASHDATA lld_PasswordProtectionModeLockingBitRead
(
FLASHDATA * base_addr
)
{
  FLASHDATA retval;
/* THIS FUNCTION DEVIATES FROM DOCUMENTATION, BUT FACTORY SPECIFIED - JCH */
/* DOCUMENTED METHOD DID NOT WORK */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);                 
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);                 
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_SECSI_SEC_LOCK_SETUP_CMD);
  FLASH_WR(base_addr, LLD_PUV7_PL_ADDR, LLD_PUV7_PPB_PGM_VER_CMD);         
  DelayMicroseconds(250);                                                          
  retval = ( FLASH_RD(base_addr, LLD_PUV7_PL_ADDR) & LLD_DEV_DQ0_MASK );   
  FLASH_WR(base_addr, 0x00, NOR_RESET_CMD); /* go back to read array mode */

  return(retval);
}

/*
*
*
*
*
*/
FLASHDATA lld_PersistentProtectionModeLockingBitRead
(
FLASHDATA * base_addr
)
{
  FLASHDATA retval = 0;
/* THIS FUNCTION DEVIATES FROM DOCUMENTATION, BUT FACTORY SPECIFIED - JCH */
/* DOCUMENTED METHOD DID NOT WORK */
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_UNLOCK_DATA1);                 
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR2, NOR_UNLOCK_DATA2);                 
  FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, LLD_PUV7_SECSI_SEC_LOCK_SETUP_CMD);
  FLASH_WR(base_addr, LLD_PUV7_SL_ADDR, LLD_PUV7_PPB_PGM_VER_CMD); /*  */
  DelayMicroseconds(250);                                                          
  retval = ( FLASH_RD(base_addr, LLD_PUV7_SL_ADDR) & LLD_DEV_DQ0_MASK );   
  FLASH_WR(base_addr, 0x00, NOR_RESET_CMD); /* go back to read array mode */

  return(retval);
}