i2cdrv8260.c

mpc8260 i2c driver code, it is used for i2c controllor on mpc8260.

	#ifdef I2C_DEBUG
		printf("I2C is busy now!");
	#endif
		return I2C_ERR_BUSY;
	}

	/* clear up I2CER */
	* M8260_I2C_I2CER(gImmrVal) = 0x17; /* Clear out I2C events */
	/* init RXBDrings */
	gI2cRxTxBD_ptr->RxBD[0].bd_length = 0; /* reset Data_length */
	gI2cRxTxBD_ptr->RxBD[0].bd_cstatus |= 0x8000 ; /* reset status */

	/* config two txbdrings,init gI2cRxBuf_ptr,gI2cTxBuf0_ptr, gI2cTxBuf1_ptr*/
	if(flag)
	{
		/* config the first txbdrings and the corresponding txbuff */
		gI2cTxBuf0_ptr[0] = trgt_addr << 1; /* Target address and read command */
		/* gI2cTxBuf0_ptr[1]=(data_addr>>8)&0x0000ffff;*/
		gI2cTxBuf0_ptr[1] = data_addr;
		gI2cRxTxBD_ptr->TxBD[0].bd_length = 2; /* one bypt for slave addr+r/w,two byte for data_addr(UINT16) */
		gI2cRxTxBD_ptr->TxBD[0].bd_cstatus = I2C_TXBD;
		gI2cRxTxBD_ptr->TxBD[0].bd_cstatus &= ~0x2800; /*not last bds,no stop */
		gI2cRxTxBD_ptr->TxBD[0].bd_cstatus |= 0x8000; /* ready */

		/* config the second txbdrings and the corresponding txbuff */
		gI2cTxBuf1_ptr[0] = (trgt_addr << 1) | 0x01; /* Target address and read command */
		gI2cRxTxBD_ptr->TxBD[1].bd_length = 1+read_len; /* one bypt for slave addr+r/w*/
		gI2cRxTxBD_ptr->TxBD[1].bd_cstatus = I2C_TXBD;
		gI2cRxTxBD_ptr->TxBD[1].bd_cstatus |= 0x8000; /* ready */
	}
	else
	{
		/* config the  txbdrings and the corresponding txbuff */
		gI2cTxBuf0_ptr[0] =(trgt_addr << 1) | 0x01; /* Target address and read command */
		gI2cRxTxBD_ptr->TxBD[0].bd_length = 1+read_len; /* one bypt for slave addr+r/w */
		gI2cRxTxBD_ptr->TxBD[0].bd_cstatus = I2C_TXBD;
		gI2cRxTxBD_ptr->TxBD[0].bd_cstatus |= 0x8000; /* ready */
	}

	/* issue start command*/
	while ((*M8260_CPCR(gImmrVal) & M8260_CPCR_FLG) != 0);
	* M8260_CPCR(gImmrVal) = M8260_CPCR_OP(M8260_CPCR_RT_INIT) |
							 M8260_CPCR_SBC(M8260_CPCR_SBC_I2C) |
							 M8260_CPCR_PAGE(M8260_CPCR_PAGE_I2C) |
							 M8260_CPCR_FLG;

	while ((*M8260_CPCR(gImmrVal) & M8260_CPCR_FLG) != 0);
	* M8260_I2C_I2COM(gImmrVal) |= 0x80;  /* issue start command */

	/* task blocked by the synchronization signal*/
	sgrtn = semTake(gI2csemSync, 0x1f);

	/* check SemTake()'s return value.*/
	if (sgrtn)
	{
	#ifdef I2C_DEBUG
		printf("the semaphore ID is invalid or the task timed out in SemTake().");
	#endif
		return I2C_ERR_READ;
	}
	else
	{
	#ifdef I2C_DEBUG
		printf("envlu =%x\n",envlu );
	#endif
		if (envlu & 0x10)
		{
			return I2C_ERR_TRANS;
		}
		if (envlu & 0x04)
		{
			return I2C_ERR_READ_BUSY;
		}
		if (envlu & 0x02)
		{
			return I2C_ERR_READ;
		}
		if (envlu & 0x01)
		{
			memcpy(recv_data_ptr,gI2cRxBuf_ptr,read_len);
		#ifdef I2C_DEBUG
			printf("read data =%x\n",*recv_data_ptr );
		#endif
			return NB_DRV_OK;
		}
	}
}


/**************************************************************************
*
*   Function Name: i2c_write
*
*   Description:
*       Master I2C controller write date to slave i2c_chip.
*
*   Input(s):
*       trgt_addr:
*		data_addr:
*		write_len:
*		send_data_ptr
*
*   Output(s):
*       no:
*
*   Returns:
*       NB_DRV_OK or ERR_NUM.
*
***************************************************************************/
SYS_STATUS i2c_write(UINT8 trgt_addr,UINT8 data_addr,UINT16 write_len,UINT8 *send_data_ptr)
{
	INT8 sgrtn;
	if (trgt_addr >= 128)
	{
	#ifdef I2C_DEBUG
		printf("Target device address must less than 128\n");
	#endif
		return I2C_ERR_PARM;
	}
	/* Check device operation mode */
	if (gI2cMode != I2C_MODE_MASTER)
	{
	#ifdef I2C_DEBUG
		printf("Current device cannot execute Master write!\n");
	#endif
		return I2C_ERR_PARM;
	}

	/* Check I2C is busy or not now */
	if ((0x8000 & (gI2cRxTxBD_ptr->TxBD[0].bd_cstatus)) != 0)
	{
	#ifdef I2C_DEBUG
		printf("I2C is busy now!");
	#endif
		return I2C_ERR_BUSY;
	}
	if ((0x8000 & (gI2cRxTxBD_ptr->TxBD[1].bd_cstatus)) != 0)
	{
	#ifdef I2C_DEBUG
		printf("I2C is busy now!");
	#endif
		return I2C_ERR_BUSY;
	}
	if ((0x8000 & (gI2cRxTxBD_ptr->RxBD[0].bd_cstatus)) != 0)
	{
	#ifdef I2C_DEBUG
		printf("I2C is busy now!");
	#endif
		return I2C_ERR_BUSY;
	}

	* M8260_I2C_I2CER(gImmrVal) = 0x17; /* Clear out I2C events */

	/* init gTxBuf_ptr0 */
	gI2cTxBuf0_ptr = (UINT8 *) gI2cRxTxBD_ptr->TxBD[0].bd_addr;

	/* config the  txbdrings and the corresponding txbuff */
	gI2cTxBuf0_ptr[0] = trgt_addr << 1; /* Target address and read command */
	/* gI2cTxBuf0_ptr[1]=(data_addr>>8)&0x0000ffff;*/
	gI2cTxBuf0_ptr[1] = data_addr;
	if (write_len!=0)
		memcpy(gI2cTxBuf0_ptr+2,send_data_ptr,write_len);
	gI2cRxTxBD_ptr->TxBD[0].bd_length = 2+write_len; /* one bypt for slave addr+r/w */
	gI2cRxTxBD_ptr->TxBD[0].bd_cstatus =I2C_TXBD;
	gI2cRxTxBD_ptr->TxBD[0].bd_cstatus |= 0x1000;
	gI2cRxTxBD_ptr->TxBD[0].bd_cstatus |= 0x8000; /* ready */

	/* issue start command*/
	while ((*M8260_CPCR(gImmrVal) & M8260_CPCR_FLG) != 0);
	* M8260_CPCR(gImmrVal) = M8260_CPCR_OP(M8260_CPCR_RT_INIT) |
							 M8260_CPCR_SBC(M8260_CPCR_SBC_I2C) |
							 M8260_CPCR_PAGE(M8260_CPCR_PAGE_I2C) |
							 M8260_CPCR_FLG;

	while ((*M8260_CPCR(gImmrVal) & M8260_CPCR_FLG) != 0);
	* M8260_I2C_I2COM(gImmrVal) |= 0x80;  /* issue start command */

	/* task blocked by the synchronization signal*/
	sgrtn = semTake(gI2csemSync, 0x1f);
	
	/* check SemTake()'s return value.*/
	if (sgrtn)
	{
	#ifdef I2C_DEBUG
		printf("the semaphore ID is invalid or the task timed out in SemTake().");
	#endif
		return I2C_ERR_WRITE;
	}
	else
	{
	#ifdef I2C_DEBUG
		printf("envlu=%x\n",envlu);
		printf("write data=%x\n",*send_data_ptr);
	#endif
		if (envlu & 0x10)
		{
			return I2C_ERR_TRANS;
		}
		if (envlu & 0x04)
		{
			return I2C_ERR_WRITE;
		}
		if (envlu & 0x02)
		{
			return NB_DRV_OK;
		}
		if (envlu & 0x01)
		{
			return I2C_ERR_WRITE;
		}
	}
}


/**************************************************************************
*
*   Function Name: i2c_test_write_read
*
*   Description:
*       test the data transtration between i2c_chips.
*
*   Input(s):
*       trgt_addr:
*		data_addr:
*		read_len:
*		flag:
*
*   Output(s):
*       recv_data_ptr:
*
*   Returns:
*       NB_DRV_OK or ERR_NUM.
*
***************************************************************************/

SYS_STATUS i2c_test_write_read(UINT8 trgt_addr,UINT8 data_addr,UINT8 send_data,UINT8 *recv_data_ptr)
{
	SYS_STATUS rtnvlu;
	UINT8 *send_data_ptr;

	*send_data_ptr = send_data;
	rtnvlu = i2c_write(trgt_addr,data_addr,1,send_data_ptr);
	switch (rtnvlu)
	{
		case I2C_ERR_SYS:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_SYS error has been occured.");
		#endif
			return I2C_ERR_SYS;
		}
		case I2C_ERR_BUSY:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_BUSY error has been occured.");
		#endif
			return I2C_ERR_BUSY;
		}
		case I2C_ERR_TRANS:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_TRANS error has been occured.");
		#endif
			return I2C_ERR_TRANS;
		}
		case I2C_ERR_WRITE:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_WRITE error has been occured.");
		#endif
			return I2C_ERR_WRITE;
		}
		case NB_DRV_OK:
			break;
	}
	rtnvlu = i2c_read(trgt_addr,data_addr,1,0,recv_data_ptr);
	switch (rtnvlu)
	{
		case I2C_ERR_SYS:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_SYS error has been occured.");
		#endif
			return I2C_ERR_SYS;
		}
		case I2C_ERR_BUSY:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_BUSY error has been occured.");
		#endif
			return I2C_ERR_BUSY;
		}
		case I2C_ERR_TRANS:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_TRANS error has been occured.");
		#endif
			return I2C_ERR_TRANS;
		}
		case I2C_ERR_READ:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_READ error has been occured.");
		#endif
			return I2C_ERR_READ;
		}	
		case I2C_ERR_READ_BUSY:
		{
		#ifdef I2C_DEBUG
			printf(" I2C_ERR_READ_BUSY error has been occured.");
		#endif
			return I2C_ERR_READ_BUSY;
		}	
		case NB_DRV_OK:
			break;
	}
#ifdef I2C_DEBUG
	printf("send data is %u ,and the received data is %u./n",send_data,*recv_data_ptr);
#endif
	if (send_data == *recv_data_ptr)
		return NB_DRV_OK;
	else
		return I2C_ERR_TEST;
}