dsmlib.c

vxworks source code, used for develop vxworks system.

    void *actVal;
    SYMBOL_ID symId;
    char demangled[MAX_SYS_SYM_LEN + 1];
    char *labelToPrint;
 
    if ((symFindSymbol (sysSymTbl, NULL, (void *)address, 
			SYM_MASK_NONE, SYM_MASK_NONE, &symId) == OK) &&
	(symNameGet (symId, &label) == OK) &&
	(symValueGet (symId, &actVal) == OK) &&
	(actVal == (void *)address))
	{
	labelToPrint = cplusDemangle(label, demangled, sizeof (demangled));
	sprintf (s, "%s", labelToPrint);
	}
    else
	sprintf (s, "0x%08x", address);
    }


#if (CPU==SH7750 || CPU==SH7700)
/*******************************************************************************
*
* dsmFindFpp - lookup FPP insn
*
* FPP instrctions may be either 16 or 32 bit; 
*
* NOMANUAL
*/

LOCAL INST *dsmFindFpp
    (
    USHORT fppInst []
    )
    {
    INST *fppPtr;

    /* Find out which instruction it is */

    for (fppPtr = &instFpp [0]; fppPtr->mask != 0; fppPtr++)
         {
         if ((fppInst [0] & fppPtr->mask) == fppPtr->op) return (fppPtr);
	 }

    /* If we're here, we couldn't find it */

    errnoSet (S_dsmLib_UNKNOWN_INSTRUCTION);
    return (NULL);
    }


/*******************************************************************************
*
* dsmPrintFpp - print SH FPP insn
*
*/
LOCAL void dsmPrintFpp
    (
    USHORT fppInst [],		/* Pointer to instructin */
    INST *fppPtr,		/* Pointer to INST returned by dsmFindFpp */
    int address,		/* Address with which to prepend instructin */
    int nwords			/* Instruction length, in words */
    )
    {
    int ix;                /* index into binInst */
    int wordsToPrint;      /* # of 5-char areas to reserve for printing
				   of hex version of instruction */
    BOOL slotInst;              /* TRUE if instruction is in delayed slot */

    slotInst = (delaySlot == TRUE) && ((address - lastAddress) == 2);

    wordsToPrint = (((nwords - 1) / 2) + 1) * 2;

    /* Print the address and the instruction, in hex */

    printf ("%06x  ", address);

    for (ix = 0; ix < wordsToPrint; ++ix)
        /* print lines in multiples of 5 words */
        {
	if ((ix > 0) && (ix % 3) == 0)          /* print words on next line */
	    printf ("\n        ");
	printf ((ix < nwords) ? "%04x " : "     ", fppInst [ix]);
	}

    if (slotInst) printf (" (");
    else          printf ("  ");

    if (fppPtr == NULL)
        {
        printf (".short  0x%04x", fppInst[0]);
        delaySlot = FALSE;
        }
	
    else
    {
    char s[64 + MAX_SYS_SYM_LEN + 1];

    /* Print the instruction mnemonic, the size code (.w, or whatever),
       and the arguments */

    prtArgsFpp (fppInst, fppPtr, address, s);
    printf ("%-10s %s", fppPtr->name, s);

    if (fppPtr->type & itDelay) delaySlot = TRUE;
    else                      delaySlot = FALSE;
    }

    if (slotInst) printf (")\n");
    else          printf ("\n");

    lastAddress = address;
    }


/******************************************************************************
*
* prtArgsFpp - format FP arguments
*
* NOMANUAL
*/

LOCAL void prtArgsFpp
    (
    USHORT fppInst [],  /* Pointer to the binary instruction */
    INST *fppPtr,    /* Pointer to the INST describing binInst */
    int address,        /* Address at which the instruction resides */
    char *s
    )
    {
    USHORT  finsn = fppInst [0];

    switch (fppPtr->type & itTypeMask)
        {
        case itOneFpReg:
            sprintf (s, "fr%u",         (finsn & 0x0f00) >> 8);          break;

	case itTwoFpReg:
            sprintf (s, "fr%u,fr%u",    (finsn & 0x00f0) >> 4,
                                        (finsn & 0x0f00) >> 8);          break;

	case itFloadFpul:
            sprintf (s, "fr%u,fpul",    (finsn & 0x0f00) >> 8);          break;

        case itFstoreFpul:
            sprintf (s, "fpul,fr%u",    (finsn & 0x0f00) >> 8);          break;

        case itThreeFpReg:
            sprintf (s, "fr0,fr%u,fr%u",(finsn & 0x00f0) >> 4,
                                        (finsn & 0x0f00) >> 8);          break;
        case itGetFRnAtR0Rm:
            sprintf (s, "@(r0,r%u),fr%u",(finsn & 0x00f0) >> 4,
                                        (finsn & 0x0f00) >> 8);          break;
        case itPopFRn:
            sprintf (s, "@r%u+,fr%u",   (finsn & 0x00f0) >> 4,
                                        (finsn & 0x0f00) >> 8);          break;
        case itGetFRnAtRm:
            sprintf (s, "@r%u,fr%u",    (finsn & 0x00f0) >> 4,
                                        (finsn & 0x0f00) >> 8);          break;
        case itPutFRmAtR0Rn:
            sprintf (s, "fr%u,@(r0,r%u)",(finsn & 0x00f0) >> 4,
                                        (finsn & 0x0f00) >> 8);          break;
        case itPushFRm:
            sprintf (s, "fr%u,@-r%u",   (finsn & 0x00f0) >> 4,
                                        (finsn & 0x0f00) >> 8);          break;

	case itPutFRmAtRn:
            sprintf (s, "fr%u,@r%u",    (finsn & 0x00f0) >> 4,
                                        (finsn & 0x0f00) >> 8);          break;

        case itLoadFpscr:
            sprintf (s, "r%u,fpscr",    (finsn & 0x0f00) >> 8);          break;

        case itLoadFpul:
            sprintf (s, "r%u,fpul",     (finsn & 0x0f00) >> 8);          break;

        case itPopFpscr:
            sprintf (s, "@r%u+,fpscr",  (finsn & 0x0f00) >> 8);          break;

        case itPopFpul:
            sprintf (s, "@r%u+,fpul",   (finsn & 0x0f00) >> 8);          break;

        case itStoreFpscr:
            sprintf (s, "fpscr,r%u",    (finsn & 0x0f00) >> 8);          break;

        case itStoreFpul:
            sprintf (s, "fpul,r%u",     (finsn & 0x0f00) >> 8);          break;

        case itPushFpscr:
            sprintf (s, "fpscr,@-r%u",  (finsn & 0x0f00) >> 8);          break;

        case itPushFpul:
            sprintf (s, "fpul,@-r%u",   (finsn & 0x0f00) >> 8);          break;

#if (CPU==SH7750)
	case itComplete:
	    s[0] = '\0';/* No arguments */				 break;

        case itFipr:
            sprintf (s, "fv%u,fv%u",    (finsn & 0x0300) >> 8,
                                        (finsn & 0x0c00) >> 10);         break;

        case itFtrv:
            sprintf (s, "xmtrx,fv%u",   (finsn & 0x0c00) >> 10);         break;

        case itConvToDp:
            sprintf (s, "fpul,dr%u",    (finsn & 0x0e00) >> 8);          break;

        case itConvToSp:
            sprintf (s, "dr%u,fpul",    (finsn & 0x0e00) >> 8);          break;

#endif /* CPU==SH7750 */
        default:
            strcpy (s, "unknown instruction type.");			 break;
        }
    }
#endif /* (CPU==SH7750 || CPU==SH7700) */

#if (CPU==SH7700 || CPU==SH7600)
/*******************************************************************************
*
* dsmFindDsp - lookup SH-DSP insn
*
* SH-DSP instrctions may be either 16 or 32 bit; if 16 bit, then the 
* instruction is in low half of the longword.
*
* NOMANUAL
*/
LOCAL SH_DSP_OPCODE_INFO *dsmFindDsp
    (
    ULONG long insn,
    ULONG long flags
    )
    {
    SH_DSP_OPCODE_INFO *op;

    for (op = instDsp; op->name; op++) 
	{
	if (((insn & op->mask) == op->insn)
	    && (!flags || (op->flags & flags)))
	    return op;
	}

    /* If we're here, we couldn't find it */
    errnoSet (S_dsmLib_UNKNOWN_INSTRUCTION);
    return NULL;
    }

/*******************************************************************************
*
* printDspArgs - print SH DSP insn args
*
*/
LOCAL void printDspArgs
    (
    ULONG insn,
    SH_DSP_OPCODE_INFO *op,
    VOIDFUNCPTR prtAddress
    )
    {     
    int n;
    long imm;
    LOCAL char *se[] = { "x0", "x1", "y0", "a1" };
    LOCAL char *sf[] = { "y0", "y1", "x0", "a1" };
    LOCAL char *sx[] = { "x0", "x1", "a0", "a1" };
    LOCAL char *sy[] = { "y0", "y1", "m0", "m1" };
    LOCAL char *dg[] = { "m0", "m1", "a0", "a1" };
    LOCAL char *ds[] = { "<illegal>", "<illegal>", "<illegal>", "<illegal>",
			  "<illegal>", "a1",        "<illegal>", "a0",
			  "x0",        "x1",        "y0",        "y1",
			  "m0",        "a1g",       "m1",        "a0g" };

    LOCAL char *du[] = { "x0", "y0", "a0", "a1" };
    LOCAL char *dx[] = { "x0", "x1" };
    LOCAL char *dy[] = { "y0", "y1" };
    LOCAL char *dz[] = { "<illegal>", "<illegal>", "<illegal>", "<illegal>",
			  "<illegal>", "a1",        "<illegal>", "a0",
			  "x0",        "x1",        "y0",        "y1",
			  "m0",        "<illegal>", "m1",        "<illegal>" };

    for (n = 0; (n < 8) && (op->arg[n] != D_END); ++n)
	{
	if ((n == 3) && (op->flags & SH_PMULS))
	    printf (" pmuls ");
	else if (n && (n < 7) && (op->arg[n] != D_END))
	    printf (",");

	switch (op->arg[n])
	    {
	    case D_AS:
		switch ((insn >> 2) & 0x03)
		    {
		    case 0:
			printf ("@-as%ld", (insn >> 8) & 0x03);
			break;
		    case 1:
			printf ("@as%ld", (insn >> 8) & 0x03);
			break;
		    case 2:
			printf ("@as%ld+", (insn >> 8) & 0x03);
			break;
		    case 3:
			printf ("@as%ld+is", (insn >> 8) & 0x03);
			break;
		    }
		break;
	    case D_AX:
		if (insn & 0x0200)
		    printf ("@ax1");
		else
		    printf ("@ax0");
		switch ((insn & 0x0c) >> 2)
		    {
		    case 1:
			break;
		    case 2:
			printf ("+");
			break;
		    case 3:
			printf ("+ix");
			break;
		    default:
			printf ("<illegal>");
			break;
		    }
		break;
	    case D_AY:
		if (insn & 0x0100)
		    printf ("@ay1");
		else
		    printf ("@ay0");
		switch (insn & 0x03)
		    {
		    case 1:
			break;
		    case 2:
			printf ("+");
			break;
		    case 3:
			printf ("+iy");
			break;
		    }
		break;
	    case D_DAX:
	        if (insn & 0x0080)
 	            printf ("a1");
 	        else
 	            printf ("a0");
	        break;
	    case D_DAY:
 	        if (insn & 0x0040)
 	            printf ("a1");
 	        else
 	            printf ("a0");
 	        break;
	    case D_DG:
		printf ("%s", dg [(insn & GG_3) >> GG_SHIFT]);
		break;
	    case D_DU:
		printf ("%s", du [(insn & UU_3) >> UU_SHIFT]);
		break;
	    case D_DS:
		printf ("%s", ds [(insn & 0x00f0) >> 4]);
		break;
	    case D_DX:
		printf ("%s", dx [(insn & 0x0080) >> 7]);
		break;
	    case D_DY:
		printf ("%s", dy [(insn & 0x0040) >> 6]);