📄 ide.h
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struct list_head list;
struct device gendev;
struct semaphore gendev_rel_sem; /* to deal with device release() */
} ide_drive_t;
#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
#define IDE_CHIPSET_PCI_MASK \
((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
struct ide_pci_device_s;
typedef struct hwif_s {
struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
struct hwif_s *mate; /* other hwif from same PCI chip */
struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
char name[6]; /* name of interface, eg. "ide0" */
/* task file registers for pata and sata */
unsigned long io_ports[IDE_NR_PORTS];
unsigned long sata_scr[SATA_NR_PORTS];
unsigned long sata_misc[SATA_NR_PORTS];
hw_regs_t hw; /* Hardware info */
ide_drive_t drives[MAX_DRIVES]; /* drive info */
u8 major; /* our major number */
u8 index; /* 0 for ide0; 1 for ide1; ... */
u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
u8 straight8; /* Alan's straight 8 check */
u8 bus_state; /* power state of the IDE bus */
u8 atapi_dma; /* host supports atapi_dma */
u8 ultra_mask;
u8 mwdma_mask;
u8 swdma_mask;
hwif_chipset_t chipset; /* sub-module for tuning.. */
struct pci_dev *pci_dev; /* for pci chipsets */
struct ide_pci_device_s *cds; /* chipset device struct */
void (*rw_disk)(ide_drive_t *, struct request *);
#if 0
ide_hwif_ops_t *hwifops;
#else
/* routine to tune PIO mode for drives */
void (*tuneproc)(ide_drive_t *, u8);
/* routine to retune DMA modes for drives */
int (*speedproc)(ide_drive_t *, u8);
/* tweaks hardware to select drive */
void (*selectproc)(ide_drive_t *);
/* chipset polling based on hba specifics */
int (*reset_poll)(ide_drive_t *);
/* chipset specific changes to default for device-hba resets */
void (*pre_reset)(ide_drive_t *);
/* routine to reset controller after a disk reset */
void (*resetproc)(ide_drive_t *);
/* special interrupt handling for shared pci interrupts */
void (*intrproc)(ide_drive_t *);
/* special host masking for drive selection */
void (*maskproc)(ide_drive_t *, int);
/* check host's drive quirk list */
int (*quirkproc)(ide_drive_t *);
/* driver soft-power interface */
int (*busproc)(ide_drive_t *, int);
// /* host rate limiter */
// u8 (*ratemask)(ide_drive_t *);
// /* device rate limiter */
// u8 (*ratefilter)(ide_drive_t *, u8);
#endif
void (*ata_input_data)(ide_drive_t *, void *, u32);
void (*ata_output_data)(ide_drive_t *, void *, u32);
void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
int (*dma_setup)(ide_drive_t *);
void (*dma_exec_cmd)(ide_drive_t *, u8);
void (*dma_start)(ide_drive_t *);
int (*ide_dma_end)(ide_drive_t *drive);
int (*ide_dma_check)(ide_drive_t *drive);
int (*ide_dma_on)(ide_drive_t *drive);
int (*ide_dma_off_quietly)(ide_drive_t *drive);
int (*ide_dma_test_irq)(ide_drive_t *drive);
int (*ide_dma_host_on)(ide_drive_t *drive);
int (*ide_dma_host_off)(ide_drive_t *drive);
int (*ide_dma_lostirq)(ide_drive_t *drive);
int (*ide_dma_timeout)(ide_drive_t *drive);
void (*OUTB)(u8 addr, unsigned long port);
void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
void (*OUTW)(u16 addr, unsigned long port);
void (*OUTL)(u32 addr, unsigned long port);
void (*OUTSW)(unsigned long port, void *addr, u32 count);
void (*OUTSL)(unsigned long port, void *addr, u32 count);
u8 (*INB)(unsigned long port);
u16 (*INW)(unsigned long port);
u32 (*INL)(unsigned long port);
void (*INSW)(unsigned long port, void *addr, u32 count);
void (*INSL)(unsigned long port, void *addr, u32 count);
/* dma physical region descriptor table (cpu view) */
unsigned int *dmatable_cpu;
/* dma physical region descriptor table (dma view) */
dma_addr_t dmatable_dma;
/* Scatter-gather list used to build the above */
struct scatterlist *sg_table;
int sg_max_nents; /* Maximum number of entries in it */
int sg_nents; /* Current number of entries in it */
int sg_dma_direction; /* dma transfer direction */
/* data phase of the active command (currently only valid for PIO/DMA) */
int data_phase;
unsigned int nsect;
unsigned int nleft;
unsigned int cursg;
unsigned int cursg_ofs;
int mmio; /* hosts iomio (0) or custom (2) select */
int rqsize; /* max sectors per request */
int irq; /* our irq number */
unsigned long dma_master; /* reference base addr dmabase */
unsigned long dma_base; /* base addr for dma ports */
unsigned long dma_command; /* dma command register */
unsigned long dma_vendor1; /* dma vendor 1 register */
unsigned long dma_status; /* dma status register */
unsigned long dma_vendor3; /* dma vendor 3 register */
unsigned long dma_prdtable; /* actual prd table address */
unsigned long dma_base2; /* extended base addr for dma ports */
unsigned dma_extra; /* extra addr for dma ports */
unsigned long config_data; /* for use by chipset-specific code */
unsigned long select_data; /* for use by chipset-specific code */
unsigned noprobe : 1; /* don't probe for this interface */
unsigned present : 1; /* this interface exists */
unsigned hold : 1; /* this interface is always present */
unsigned serialized : 1; /* serialized all channel operation */
unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
unsigned reset : 1; /* reset after probe */
unsigned autodma : 1; /* auto-attempt using DMA at boot */
unsigned udma_four : 1; /* 1=ATA-66 capable, 0=default */
unsigned no_lba48 : 1; /* 1 = cannot do LBA48 */
unsigned no_lba48_dma : 1; /* 1 = cannot do LBA48 DMA */
unsigned no_dsc : 1; /* 0 default, 1 dsc_overlap disabled */
unsigned auto_poll : 1; /* supports nop auto-poll */
unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
struct device gendev;
struct semaphore gendev_rel_sem; /* To deal with device release() */
void *hwif_data; /* extra hwif data */
unsigned dma;
void (*led_act)(void *data, int rw);
} ide_hwif_t;
/*
* internal ide interrupt handler type
*/
typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
typedef int (ide_expiry_t)(ide_drive_t *);
typedef struct hwgroup_s {
/* irq handler, if active */
ide_startstop_t (*handler)(ide_drive_t *);
/* irq handler, suspended if active */
ide_startstop_t (*handler_save)(ide_drive_t *);
/* BOOL: protects all fields below */
volatile int busy;
/* BOOL: wake us up on timer expiry */
unsigned int sleeping : 1;
/* BOOL: polling active & poll_timeout field valid */
unsigned int polling : 1;
/* current drive */
ide_drive_t *drive;
/* ptr to current hwif in linked-list */
ide_hwif_t *hwif;
/* for pci chipsets */
struct pci_dev *pci_dev;
/* chipset device struct */
struct ide_pci_device_s *cds;
/* current request */
struct request *rq;
/* failsafe timer */
struct timer_list timer;
/* local copy of current write rq */
struct request wrq;
/* timeout value during long polls */
unsigned long poll_timeout;
/* queried upon timeouts */
int (*expiry)(ide_drive_t *);
/* ide_system_bus_speed */
int pio_clock;
unsigned char cmd_buf[4];
} ide_hwgroup_t;
/* structure attached to the request for IDE_TASK_CMDS */
/*
* configurable drive settings
*/
#define TYPE_INT 0
#define TYPE_INTA 1
#define TYPE_BYTE 2
#define TYPE_SHORT 3
#define SETTING_READ (1 << 0)
#define SETTING_WRITE (1 << 1)
#define SETTING_RW (SETTING_READ | SETTING_WRITE)
typedef int (ide_procset_t)(ide_drive_t *, int);
typedef struct ide_settings_s {
char *name;
int rw;
int read_ioctl;
int write_ioctl;
int data_type;
int min;
int max;
int mul_factor;
int div_factor;
void *data;
ide_procset_t *set;
int auto_remove;
struct ide_settings_s *next;
} ide_settings_t;
extern struct semaphore ide_setting_sem;
extern int ide_add_setting(ide_drive_t *drive, const char *name, int rw, int read_ioctl, int write_ioctl, int data_type, int min, int max, int mul_factor, int div_factor, void *data, ide_procset_t *set);
extern ide_settings_t *ide_find_setting_by_name(ide_drive_t *drive, char *name);
extern int ide_read_setting(ide_drive_t *t, ide_settings_t *setting);
extern int ide_write_setting(ide_drive_t *drive, ide_settings_t *setting, int val);
extern void ide_add_generic_settings(ide_drive_t *drive);
/*
* /proc/ide interface
*/
typedef struct {
const char *name;
mode_t mode;
read_proc_t *read_proc;
write_proc_t *write_proc;
} ide_proc_entry_t;
#ifdef CONFIG_PROC_FS
extern struct proc_dir_entry *proc_ide_root;
extern void proc_ide_create(void);
extern void proc_ide_destroy(void);
extern void create_proc_ide_interfaces(void);
void destroy_proc_ide_interface(ide_hwif_t *);
extern void ide_add_proc_entries(struct proc_dir_entry *, ide_proc_entry_t *, void *);
extern void ide_remove_proc_entries(struct proc_dir_entry *, ide_proc_entry_t *);
read_proc_t proc_ide_read_capacity;
read_proc_t proc_ide_read_geometry;
#ifdef CONFIG_BLK_DEV_IDEPCI
void ide_pci_create_host_proc(const char *, get_info_t *);
#endif
/*
* Standard exit stuff:
*/
#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
{ \
len -= off; \
if (len < count) { \
*eof = 1; \
if (len <= 0) \
return 0; \
} else \
len = count; \
*start = page + off; \
return len; \
}
#else
static inline void create_proc_ide_interfaces(void) { ; }
static inline void destroy_proc_ide_interface(ide_hwif_t *hwif) { ; }
#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
#endif
/*
* Power Management step value (rq->pm->pm_step).
*
* The step value starts at 0 (ide_pm_state_start_suspend) for a
* suspend operation or 1000 (ide_pm_state_start_resume) for a
* resume operation.
*
* For each step, the core calls the subdriver start_power_step() first.
* This can return:
* - ide_stopped : In this case, the core calls us back again unless
* step have been set to ide_power_state_completed.
* - ide_started : In this case, the channel is left busy until an
* async event (interrupt) occurs.
* Typically, start_power_step() will issue a taskfile request with
* do_rw_taskfile().
*
* Upon reception of the interrupt, the core will call complete_power_step()
* with the error code if any. This routine should update the step value
* and return. It should not start a new request. The core will call
* start_power_step for the new step value, unless step have been set to
* ide_power_state_completed.
*
* Subdrivers are expected to define their own additional power
* steps from 1..999 for suspend and from 1001..1999 for resume,
* other values are reserved for future use.
*/
enum {
ide_pm_state_completed = -1,
ide_pm_state_start_suspend = 0,
ide_pm_state_start_resume = 1000,
};
/*
* Subdrivers support.
*/
typedef struct ide_driver_s {
struct module *owner;
const char *version;
u8 media;
unsigned supports_dsc_overlap : 1;
ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
int (*end_request)(ide_drive_t *, int, int);
ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
int (*ioctl)(ide_drive_t *, struct inode *, struct file *, unsigned int, unsigned long);
ide_proc_entry_t *proc;
void (*ata_prebuilder)(ide_drive_t *);
void (*atapi_prebuilder)(ide_drive_t *);
struct device_driver gen_driver;
} ide_driver_t;
int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
/*
* ide_hwifs[] is the master data structure used to keep track
* of just about everything in ide.c. Whenever possible, routines
* should be using pointers to a drive (ide_drive_t *) or
* pointers to a hwif (ide_hwif_t *), rather than indexing this
* structure directly (the allocation/layout may change!).
*
*/
#ifndef _IDE_C
extern ide_hwif_t ide_hwifs[]; /* master data repository */
#endif
extern int noautodma;
extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
extern int __ide_end_request (ide_drive_t *drive, struct request *rq, int uptodate, int nrsecs);
/*
* This is used on exit from the driver to designate the next irq handler
* and also to start the safety timer.
*/
extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
/*
* This is used on exit from the driver to designate the next irq handler
* and start the safety time safely and atomically from the IRQ handler
* with respect to the command issue (which it also does)
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