i2o.h

umon bootloader source code, support mips cpu.

/**
 *	i2o_driver_notify_controller_remove - Send notification of removed
 *					      controller to a single I2O driver
 *
 *	Send notification of removed controller to a single registered driver.
 */
static inline void i2o_driver_notify_controller_remove(struct i2o_driver *drv,
						       struct i2o_controller *c)
{
	if (drv->notify_controller_remove)
		drv->notify_controller_remove(c);
};

/**
 *	i2o_driver_notify_device_add - Send notification of added device to a
 *				       single I2O driver
 *
 *	Send notification of added device to a single registered driver.
 */
static inline void i2o_driver_notify_device_add(struct i2o_driver *drv,
						struct i2o_device *i2o_dev)
{
	if (drv->notify_device_add)
		drv->notify_device_add(i2o_dev);
};

/**
 *	i2o_driver_notify_device_remove - Send notification of removed device
 *					  to a single I2O driver
 *
 *	Send notification of removed device to a single registered driver.
 */
static inline void i2o_driver_notify_device_remove(struct i2o_driver *drv,
						   struct i2o_device *i2o_dev)
{
	if (drv->notify_device_remove)
		drv->notify_device_remove(i2o_dev);
};

extern void i2o_driver_notify_controller_add_all(struct i2o_controller *);
extern void i2o_driver_notify_controller_remove_all(struct i2o_controller *);
extern void i2o_driver_notify_device_add_all(struct i2o_device *);
extern void i2o_driver_notify_device_remove_all(struct i2o_device *);

/* I2O device functions */
extern int i2o_device_claim(struct i2o_device *);
extern int i2o_device_claim_release(struct i2o_device *);

/* Exec OSM functions */
extern int i2o_exec_lct_get(struct i2o_controller *);

/* device to i2o_device and driver to i2o_driver convertion functions */
#define to_i2o_driver(drv) container_of(drv,struct i2o_driver, driver)
#define to_i2o_device(dev) container_of(dev, struct i2o_device, device)

/*
 *	Messenger inlines
 */
static inline u32 I2O_POST_READ32(struct i2o_controller *c)
{
	rmb();
	return readl(c->post_port);
};

static inline void I2O_POST_WRITE32(struct i2o_controller *c, u32 val)
{
	wmb();
	writel(val, c->post_port);
};

static inline u32 I2O_REPLY_READ32(struct i2o_controller *c)
{
	rmb();
	return readl(c->reply_port);
};

static inline void I2O_REPLY_WRITE32(struct i2o_controller *c, u32 val)
{
	wmb();
	writel(val, c->reply_port);
};

static inline u32 I2O_IRQ_READ32(struct i2o_controller *c)
{
	rmb();
	return readl(c->irq_mask);
};

static inline void I2O_IRQ_WRITE32(struct i2o_controller *c, u32 val)
{
	wmb();
	writel(val, c->irq_mask);
	wmb();
};

/**
 *	i2o_msg_get - obtain an I2O message from the IOP
 *	@c: I2O controller
 *	@msg: pointer to a I2O message pointer
 *
 *	This function tries to get a message slot. If no message slot is
 *	available do not wait until one is availabe (see also i2o_msg_get_wait).
 *
 *	On a success the message is returned and the pointer to the message is
 *	set in msg. The returned message is the physical page frame offset
 *	address from the read port (see the i2o spec). If no message is
 *	available returns I2O_QUEUE_EMPTY and msg is leaved untouched.
 */
static inline u32 i2o_msg_get(struct i2o_controller *c,
			      struct i2o_message __iomem **msg)
{
	u32 m;

	if ((m = I2O_POST_READ32(c)) != I2O_QUEUE_EMPTY)
		*msg = c->in_queue.virt + m;

	return m;
};

/**
 *	i2o_msg_post - Post I2O message to I2O controller
 *	@c: I2O controller to which the message should be send
 *	@m: the message identifier
 *
 *	Post the message to the I2O controller.
 */
static inline void i2o_msg_post(struct i2o_controller *c, u32 m)
{
	I2O_POST_WRITE32(c, m);
};

/**
 * 	i2o_msg_post_wait - Post and wait a message and wait until return
 *	@c: controller
 *	@m: message to post
 *	@timeout: time in seconds to wait
 *
 * 	This API allows an OSM to post a message and then be told whether or
 *	not the system received a successful reply. If the message times out
 *	then the value '-ETIMEDOUT' is returned.
 *
 *	Returns 0 on success or negative error code on failure.
 */
static inline int i2o_msg_post_wait(struct i2o_controller *c, u32 m,
				    unsigned long timeout)
{
	return i2o_msg_post_wait_mem(c, m, timeout, NULL);
};

/**
 *	i2o_flush_reply - Flush reply from I2O controller
 *	@c: I2O controller
 *	@m: the message identifier
 *
 *	The I2O controller must be informed that the reply message is not needed
 *	anymore. If you forget to flush the reply, the message frame can't be
 *	used by the controller anymore and is therefore lost.
 *
 *	FIXME: is there a timeout after which the controller reuse the message?
 */
static inline void i2o_flush_reply(struct i2o_controller *c, u32 m)
{
	I2O_REPLY_WRITE32(c, m);
};

/**
 *	i2o_out_to_virt - Turn an I2O message to a virtual address
 *	@c: controller
 *	@m: message engine value
 *
 *	Turn a receive message from an I2O controller bus address into
 *	a Linux virtual address. The shared page frame is a linear block
 *	so we simply have to shift the offset. This function does not
 *	work for sender side messages as they are ioremap objects
 *	provided by the I2O controller.
 */
static inline struct i2o_message *i2o_msg_out_to_virt(struct i2o_controller *c,
						      u32 m)
{
	BUG_ON(m < c->out_queue.phys
	       || m >= c->out_queue.phys + c->out_queue.len);

	return c->out_queue.virt + (m - c->out_queue.phys);
};

/**
 *	i2o_msg_in_to_virt - Turn an I2O message to a virtual address
 *	@c: controller
 *	@m: message engine value
 *
 *	Turn a send message from an I2O controller bus address into
 *	a Linux virtual address. The shared page frame is a linear block
 *	so we simply have to shift the offset. This function does not
 *	work for receive side messages as they are kmalloc objects
 *	in a different pool.
 */
static inline struct i2o_message __iomem *i2o_msg_in_to_virt(struct i2o_controller *c,
						     u32 m)
{
	return c->in_queue.virt + m;
};

/**
 *	i2o_dma_alloc - Allocate DMA memory
 *	@dev: struct device pointer to the PCI device of the I2O controller
 *	@addr: i2o_dma struct which should get the DMA buffer
 *	@len: length of the new DMA memory
 *	@gfp_mask: GFP mask
 *
 *	Allocate a coherent DMA memory and write the pointers into addr.
 *
 *	Returns 0 on success or -ENOMEM on failure.
 */
static inline int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr,
				size_t len, unsigned int gfp_mask)
{
	addr->virt = dma_alloc_coherent(dev, len, &addr->phys, gfp_mask);
	if (!addr->virt)
		return -ENOMEM;

	memset(addr->virt, 0, len);
	addr->len = len;

	return 0;
};

/**
 *	i2o_dma_free - Free DMA memory
 *	@dev: struct device pointer to the PCI device of the I2O controller
 *	@addr: i2o_dma struct which contains the DMA buffer
 *
 *	Free a coherent DMA memory and set virtual address of addr to NULL.
 */
static inline void i2o_dma_free(struct device *dev, struct i2o_dma *addr)
{
	if (addr->virt) {
		if (addr->phys)
			dma_free_coherent(dev, addr->len, addr->virt,
					  addr->phys);
		else
			kfree(addr->virt);
		addr->virt = NULL;
	}
};

/**
 *	i2o_dma_map - Map the memory to DMA
 *	@dev: struct device pointer to the PCI device of the I2O controller
 *	@addr: i2o_dma struct which should be mapped
 *
 *	Map the memory in addr->virt to coherent DMA memory and write the
 *	physical address into addr->phys.
 *
 *	Returns 0 on success or -ENOMEM on failure.
 */
static inline int i2o_dma_map(struct device *dev, struct i2o_dma *addr)
{
	if (!addr->virt)
		return -EFAULT;

	if (!addr->phys)
		addr->phys = dma_map_single(dev, addr->virt, addr->len,
					    DMA_BIDIRECTIONAL);
	if (!addr->phys)
		return -ENOMEM;

	return 0;
};

/**
 *	i2o_dma_unmap - Unmap the DMA memory
 *	@dev: struct device pointer to the PCI device of the I2O controller
 *	@addr: i2o_dma struct which should be unmapped
 *
 *	Unmap the memory in addr->virt from DMA memory.
 */
static inline void i2o_dma_unmap(struct device *dev, struct i2o_dma *addr)
{
	if (!addr->virt)
		return;

	if (addr->phys) {
		dma_unmap_single(dev, addr->phys, addr->len, DMA_BIDIRECTIONAL);
		addr->phys = 0;
	}
};

/*
 *	Endian handling wrapped into the macro - keeps the core code
 *	cleaner.
 */

#define i2o_raw_writel(val, mem)	__raw_writel(cpu_to_le32(val), mem)

extern int i2o_parm_field_get(struct i2o_device *, int, int, void *, int);
extern int i2o_parm_table_get(struct i2o_device *, int, int, int, void *, int,
			      void *, int);

/* debugging and troubleshooting/diagnostic helpers. */
#define osm_printk(level, format, arg...)  \
	printk(level "%s: " format, OSM_NAME , ## arg)

#ifdef DEBUG
#define osm_debug(format, arg...) \
	osm_printk(KERN_DEBUG, format , ## arg)
#else
#define osm_debug(format, arg...) \
        do { } while (0)
#endif

#define osm_err(format, arg...)		\
	osm_printk(KERN_ERR, format , ## arg)
#define osm_info(format, arg...)		\
	osm_printk(KERN_INFO, format , ## arg)
#define osm_warn(format, arg...)		\
	osm_printk(KERN_WARNING, format , ## arg)

/* debugging functions */
extern void i2o_report_status(const char *, const char *, struct i2o_message *);
extern void i2o_dump_message(struct i2o_message *);
extern void i2o_dump_hrt(struct i2o_controller *c);
extern void i2o_debug_state(struct i2o_controller *c);

/*
 *	Cache strategies
 */

/*	The NULL strategy leaves everything up to the controller. This tends to be a
 *	pessimal but functional choice.
 */
#define CACHE_NULL		0
/*	Prefetch data when reading. We continually attempt to load the next 32 sectors
 *	into the controller cache.
 */