csbpci.c

umon bootloader source code, support mips cpu.

									pci_dev_info[pci_dev].bar_size[bar] = bar_size;
									pci_dev_info[pci_dev].bar_map[bar] = io_base;
									pci_cfg_write_dword(bus, PCI_MAKE_DEV_FUNC(dev, func), ((bar << 2) + PCI_CFG_BAR0_REG), io_base);
								}
								else {
									pci_dev_info[pci_dev].bar_size[bar] = bar_size;
									pci_dev_info[pci_dev].bar_map[bar] = io_base;
									pci_cfg_write_dword(bus, PCI_MAKE_DEV_FUNC(dev, func), ((bar << 2) + PCI_CFG_BAR0_REG), io_base);
								}
								// do we really have the space?
								if (io_base > PCI_IO_BASE + PCI_IO_SIZE) return PCI_IO_SPACE_ERR;
								// Yes
								io_base = io_base + bar_size;
							}
							else { // MEM
#ifdef PCI_DBG
								printf("PCI Probe Raw Mem BAR = %08x\n", bar_size);
#endif
								// assign a minimum of 1M for Memory
								if(bar_size < 0x00100000) bar_size = 0xffff0000;

								// save the boundry as a mask for use later
								bar_boundry = ~(bar_size & 0xfffffff0);

#ifdef PCI_DBG
								printf("PCI Probe BAR Boundry = %08x\n", bar_boundry);
#endif
								// Check the BAR type as we only support 32 or 64-bit BAR's
								bar_type = (bar_size & 0x06) >> 1;
								if ((bar_type != PCI_MEM_BAR_TYPE_32BIT) && (bar_type != PCI_MEM_BAR_TYPE_64BIT)) return PCI_MEM_BAR_TYPE_ERR;

								// MEM - convert raw bar size to final power of 2 size
								bar_size = bar_boundry + 1;

#ifdef PCI_DBG
								printf("PCI Probe Final BAR Size = %08x\n", bar_size);
#endif
								// sanity check it against maximum size MEM we allow
								if (bar_size > PCI_MEM_BAR_MAX)
								{
									return PCI_MEM_BAR_MAX_ERR;
								}

								// All allocation must occur on the boundry specificed by the size
								if (mem_base & ~bar_boundry){
									mem_base = mem_base + bar_size;
									mem_base = mem_base & ~bar_boundry;
									pci_dev_info[pci_dev].bar_size[bar] = bar_size;
									pci_dev_info[pci_dev].bar_map[bar] = mem_base;
									pci_cfg_write_dword(bus, PCI_MAKE_DEV_FUNC(dev, func), ((bar << 2) + PCI_CFG_BAR0_REG), mem_base);
								}
								else {
									pci_dev_info[pci_dev].bar_size[bar] = bar_size;
									pci_dev_info[pci_dev].bar_map[bar] = mem_base;
									pci_cfg_write_dword(bus, PCI_MAKE_DEV_FUNC(dev, func), ((bar << 2) + PCI_CFG_BAR0_REG), mem_base);
								}
								// do we really have the space?
								if (mem_base > PCI_MEM_BASE + PCI_MEM_SIZE) return PCI_MEM_SPACE_ERR;
								// Yes
								mem_base = mem_base + bar_size;

								// if this was a 64-bit BAR, fill the next BAR with all 0's
								if (bar_type == PCI_MEM_BAR_TYPE_64BIT){
									bar++;
									pci_cfg_write_dword(bus, PCI_MAKE_DEV_FUNC(dev, func), ((bar << 2) + PCI_CFG_BAR0_REG), 0x00000000);
									pci_dev_info[pci_dev].bar_size[bar] = 0x0;
									pci_dev_info[pci_dev].bar_map[bar] = 0x0;
								} // if 64-bit BAR
							} // IO or MEM
						} // if bar_size != 0
						else { // invalid bar
							pci_dev_info[pci_dev].bar_size[bar] = 0x0;
							pci_dev_info[pci_dev].bar_map[bar] = 0x0;
						}
					} // for BAR
					pci_dev_info[pci_dev].bus = bus;
					pci_dev_info[pci_dev].dev = dev;
					pci_dev_info[pci_dev].func = func;
					pci_dev++;
					if (pci_dev > PCI_DEV_MAX) return PCI_DEV_MAX_ERR;  // is this really an error?
				
					// Some devices ignore the function number, so check the multifunction bit in the header type reg
					if ((pci_cfg_read_byte (bus, PCI_MAKE_DEV_FUNC(dev, func), PCI_CFG_HDR_TYPE_REG) & 0x80) == 0x00)
						break;	// not a mutlifunction header so break out of the function loop
				} // not a bridge
			} // if non-0xFFFF vendor
			else // 0xFFFF returned 
				break;	// don't bother checking the remaining functions for the current device
		} // for function
	} // for device
	return 0;
}

//--------------------------------------------------------------------------
// pci_tst()
//
// This routine inits and then probes the PCI bus
// then displays the results
//
char *pciHelp[] = {
	"PCI bus test",
    "-[i]",
    "Options:",
    " -i Get info only, does not run test",
	(char *)0,
};

int pci_tst(int argc,char *argv[])
{
    int  next_bus;
	int temp, i, x, opt;
	int get_info = 0;

    while ((opt=getopt(argc,argv,"i")) != -1) {
        switch(opt) {
	        case 'i':   // get info only
				get_info = 1;
			break;
			default:	// test with current mode
				break;
		}
	}
	if (get_info == 0)
	{
		// Init the PCI Interface
		pci_init();
		printf("Begin PCI Bus Probe.\n");
		// Now probe the bus
		next_bus = 0;
		mem_base = PCI_MEM_BASE;
		io_base = PCI_IO_BASE;
		pci_dev = 0;
		
		temp = pci_probe_bus();
		if (temp){
			printf("PCI Probe Failed, Returned Status = %08x\n", temp);
			printf("Next Bus = %08x\n", next_bus);
			printf("IO_BASE  = 0x%08lX\n", io_base);
			printf("MEM_BASE = 0x%08lX\n", mem_base);
			printf("PCI_DEV  = %ld\n", pci_dev);
			printf("    PCI_DEV.VENDOR ID       = 0x%04X\n",
				pci_dev_info[pci_dev].ven_id);
			printf("    PCI_DEV.DEVICE ID       = 0x%04X\n",
				pci_dev_info[pci_dev].dev_id);
			printf("    PCI_DEV.DEVICE CLASS    = 0x%02X\n",
				pci_dev_info[pci_dev].class);
			printf("    PCI_DEV.DEVICE SUBCLASS = 0x%02X\n",
				pci_dev_info[pci_dev].subclass);
			printf("    PCI_DEV.FUNCTION        = %ld\n",
				(ulong)pci_dev_info[pci_dev].func);
			printf("    PCI_DEV.DEVICE          = %ld\n",
				(ulong)pci_dev_info[pci_dev].dev);
			printf("    PCI_DEV.BUS             = %ld\n",
				(ulong)pci_dev_info[pci_dev].bus);
			printf("    PCI_DEV BAR Info:\n");
			for (x = 0; x < 6; x++){
				printf("          PCI_DEV.BAR_SIZE[%d] = 0x%08lX\n",
					x, pci_dev_info[pci_dev].bar_size[x]);
				printf("          PCI_DEV.BAR_MAP[%d]  = 0x%08lX\n",
					x, pci_dev_info[pci_dev].bar_map[x]);
			}
		}
	} // get info == 0
	if (pci_dev == 0){ 
		printf("\nPCI Probe Found No PCI Devices\n");
	}
	else {
		printf("\nPCI Probe Found The Following %ld PCI Device(s)\n", pci_dev);
		// dump the contents of pci_dev_info
		for (i = 0; i < pci_dev; i++){
			printf("PCI_DEV = %01d\n", i);
			printf("    PCI_DEV.VENDOR ID       = 0x%04X\n",
				pci_dev_info[i].ven_id);
			printf("    PCI_DEV.DEVICE ID       = 0x%04X\n",
				pci_dev_info[i].dev_id);
			printf("    PCI_DEV.DEVICE CLASS    = 0x%02X\n",
				pci_dev_info[i].class);
			printf("    PCI_DEV.DEVICE SUBCLASS = 0x%02X\n",
				pci_dev_info[i].subclass);
			printf("    PCI_DEV.BUS             = %ld\n",
				pci_dev_info[i].bus);
			printf("    PCI_DEV.DEVICE          = %ld\n",
				pci_dev_info[i].dev);
			printf("    PCI_DEV.FUNCTION        = %ld\n",
				pci_dev_info[i].func);
			printf("    PCI_DEV BAR Info:\n");
			for (x = 0; x < 6; x++){
				printf("        PCI_DEV.BAR_SIZE[%d] = 0x%08lX\n",
					x, pci_dev_info[i].bar_size[x]);
				printf("        PCI_DEV.BAR_MAP[%d]  = 0x%08lX\n",
					x, pci_dev_info[i].bar_map[x]);
			}
		} // for i < pci_dev
		printf("Final IO_BASE  = 0x%08lX\n", io_base);
		printf("Final MEM_BASE = 0x%08lX\n", mem_base);

	}  // if-else pci_dev
	return 0;
}

//--------------------------------------------------------------------------
// End of pci.c