📄 s29gl064a90.c
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/*
**************************************************************************************
* Copyright (c) 2005 vBridge Microsystem, Inc.
* Unpublished & Not for Publication
* All Rights Reserved
*
* File : 28F640J3.c
*
* Description :
*
* Date :
**************************************************************************************
*/
#include "config.h"
#ifdef INCLUDE_NOR_FLASH_S29GL064A90
#ifdef INCLUDE_FLASH
#include "./pif.h"
//#include "SST39VF3201.h"
#include "S29GL064A90.h"
#include "flash.h"
#include "Def_type.h"
#define INTEL_DT28F128J5 0x00890018
#define INTEL_28F640 0x00890017
#define INTEL_DT28F640J5 0x00890015
#define ST_M58LW064D 0x00200017
#define ST_M25P64 0x00172020
#define S29GL128M90 0x0001227e
#define SST39VF3201 0x00bf235b // jason add
#define S29GL064A90 0x0001227e // jason add
typedef unsigned char uchar;
extern char *boot_device_name;
/*
**************************************************************************************
* NorFlashPifInit
*
* Description: initialize the PCMCIA interface
*
* Arguments : devID controls which PCMCIA device to access.
* 0 – CS0
* 1 – CS1
* 2 – CS2
* 3 – CS3
* For Virtex-4, devID = 0.
*
* Return : none
*
* Note(s) : Before any Nor flash operations, you should call it at first.
**************************************************************************************
*/
void NorFlashPifInit(void)
{
unsigned int tmp;
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PifTimingRegSet(0xf /* setup */, 0xf /* hold */, 0xf /* interval */, \
0xf /* wait_cycle */, PIF_NO_WAIT /* ioack_wait */, \
PCMCIA_WIDTH_16BIT /* pcmcia_width */, PCMCIA_NO_CHECK /* wait */, \
PCMCIA_INSERT_IDLE /* swait */, PIF_CS0 /* devID */, \
PIF_OE /* xfr_type */);
PIF_INTR_DIS(); // Disable the PIF interrupts
PIF_DONE_CLEAR(); // Clear the bit done
tmp = *(unsigned int *)0xa80a001c;
tmp &= 0x7fffffff;
*(unsigned int *)0xa80a001c = tmp;
*(volatile unsigned *)(0xa8010020) =0x80000004;
}
/*
*********************************************************************************************
* NorFlashErase
*
* Description: erase one specified block.
*
* Arguments : block_no is the block number.
*
* Return : SUCCESSFUL shows the erasure is successful.
* FAILED shows the erasure is failed.
*
* Note(s) :
*********************************************************************************************
*/
int NorFlashErase(int block_no)
{
unsigned short status;
int i;
int num;
#if 0
/* the first cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = block_no * NOR_FLASH_BYTES_PER_SECTOR; // the byte address
PIF_START();
rPIF_PCMCIA_DATA = NOR_FLASH_ERASE_BLOCK1;
PifWaitTillDone(); // Wait till the first cycle complete
/* the second cycle of block erase */
PIF_START();
rPIF_PCMCIA_DATA = NOR_FLASH_ERASE_BLOCK2;
PifWaitTillDone(); // Wait till the second cycle complete
#endif
//printf("Erase ...\n");
/* the first cycle of block erase */
if(block_no == 0)
{
for(num = 0; num < BOOT_SECTOR_NUM; num ++)
{
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0xaa;
PifWaitTillDone(); // Wait till the first cycle complete
/* the second cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0x554; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x55;
PifWaitTillDone(); // Wait till the first cycle complete
/* the third cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x80;
PifWaitTillDone(); // Wait till the first cycle complete
/* the fourth cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0xaa;
PifWaitTillDone(); // Wait till the first cycle complete
/* the fifth cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0x554; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x55;
PifWaitTillDone(); // Wait till the first cycle complete
/* the sixth cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
//rPIF_PCI_DEV_A = block_no * NOR_FLASH_BYTES_PER_SECTOR ; // the byte address
rPIF_PCI_DEV_A = num * NOR_FLASH_BYTES_BOOT_SECTOR; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x30; //30 ->50
PifWaitTillDone(); // Wait till the first cycle complete
status = 0x0;
do{ // Flash is busy?
//printf("before erase : the status is %x \n",status);
NorFlashRd(rPIF_PCI_DEV_A, &status, 1);
// printf("erase: the status is %x \n",status);
}while(!(status & 0x80));
}
}
else{
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0xaa;
PifWaitTillDone(); // Wait till the first cycle complete
/* the second cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0x554; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x55;
PifWaitTillDone(); // Wait till the first cycle complete
/* the third cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x80;
PifWaitTillDone(); // Wait till the first cycle complete
/* the fourth cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0xaa;
PifWaitTillDone(); // Wait till the first cycle complete
/* the fifth cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0x554; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x55;
PifWaitTillDone(); // Wait till the first cycle complete
/* the sixth cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
//rPIF_PCI_DEV_A = block_no * NOR_FLASH_BYTES_PER_SECTOR ; // the byte address
rPIF_PCI_DEV_A = block_no * NOR_FLASH_BYTES_PER_SECTOR; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x30; //30 ->50
PifWaitTillDone(); // Wait till the first cycle complete
status = 0x0;
do{ // Flash is busy?
//printf("before erase : the status is %x \n",status);
NorFlashRd(rPIF_PCI_DEV_A, &status, 1);
// printf("erase: the status is %x \n",status);
}while(!(status & 0x80));
//printf("Erase OK Status %x !\r\n", status);
/*
status = 0x0;
for(i=0; i< 40; i++)
{
NorFlashRd(FLASH_MAC_ADDR+i, &status, 1);
printf("%x ",status);
if(i&0xf == 0)
printf("\n");
status = 0x0;
}
*/
//if(status & 0x20) // Whether the SR4 or SR5 is set
// return FAILED;
}
return SUCCESSFUL;
}
/*
*********************************************************************************************
* NorFlashProg
*
* Description: program a half-word into the specified address
*
* Arguments : addr is the byte address.
* data is the half-word to be programmed.
*
* Return : SUCCESSFUL shows the erasure is successful.
* FAILED shows the erasure is failed.
*
* Note(s) :
*********************************************************************************************
*/
int NorFlashProg(int addr, unsigned short data)
{
unsigned short status;
//printf("write data: %08x to addr: %08x",data, addr);
addr = addr * 1;
/* the first cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0xaa;
PifWaitTillDone(); // Wait till the first cycle complete
/* the second cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0x554; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x55;
PifWaitTillDone(); // Wait till the first cycle complete
/* the third cycle */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = NOR_FLASH_PROG_WORD;
PifWaitTillDone(); // Wait till the first cycle complete
/* the fourth cycle */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = addr; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = data;
PifWaitTillDone(); // Wait till the second cycle complete
status = 0x0;
do{ // Flash is busy?
NorFlashRd(addr, &status, 1);
//printf("read value is %08x, from addr %08x \n",status, addr);
}while(!((status & 0x80) == (data & 0x80)));
// HwDelayUs(100);
//printf("Program OK addr %08x !\r\n", addr);
//if(status & 0x22) // Whether the SR1 SR3 or SR4 is set
// return FAILED;
return SUCCESSFUL;
}
/*
*********************************************************************************************
* NorFlashClrSR
*
* Description: clr the flash status.
*
* Arguments : none
*
* Return : none
*
* Note(s) : If FAILED returns after program or erase operation,
* you should run NorFlashClrSR before the next program or erase operation.
* The function does not verify.
*********************************************************************************************
*/
void NorFlashClrSR(void)
{
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
PIF_START();
rPIF_PCMCIA_DATA = NOR_FLASH_CL_SR;
PifWaitTillDone(); // Wait till the first cycle complete
}
/*
*********************************************************************************************
* NorFlashRdSR
*
* Description: read the flash status.
*
* Arguments : none
*
* Return : the flash status
*
* Note(s) :
*********************************************************************************************
*/
unsigned short NorFlashRdSR(void)
{
unsigned short status;
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
PIF_START();
rPIF_PCMCIA_DATA = NOR_FLASH_RD_SR;
PifWaitTillDone(); // Wait till the first cycle complete
NorFlashRd(0, &status, 1);
return(status);
}
unsigned short NorFlashRdManufacturerID(void)
{
unsigned short mID;
/* the first cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0xaa;
PifWaitTillDone(); // Wait till the first cycle complete
/* the second cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0x554; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x55;
PifWaitTillDone(); // Wait till the first cycle complete
/* the third cycle */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = NOR_FLASH_RD_ID;
PifWaitTillDone(); // Wait till the first cycle complete
NorFlashRd(0, &mID, 1); return mID;
}
unsigned short NorFlashRdDeviceID(void)
{
unsigned short deviceID;
/* the first cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0xaa;
PifWaitTillDone(); // Wait till the first cycle complete
/* the second cycle of block erase */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0x554; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = 0x55;
PifWaitTillDone(); // Wait till the first cycle complete
/* the third cycle */
PIF_WRITE_SET();
rPIF_PCI_LEN = 2;
rPIF_PCI_DEV_A = 0xaaa; // the byte address
PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);
PIF_START();
rPIF_PCMCIA_DATA = NOR_FLASH_RD_ID;
PifWaitTillDone(); // Wait till the first cycle complete
NorFlashRd(2, &deviceID, 1); return deviceID;
}
int NorFlashRdID(void)
{
unsigned short mid,did;
mid = NorFlashRdManufacturerID();
did = NorFlashRdDeviceID();
return (mid<<16 | did);
}
/*
*********************************************************************************************
* NorFlashRdData
*
* Description: read the data from the specified address.
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