74ls164.a

数字电路的基础器件很有用的

	  DIN BIT P2.1
      CLK BIT P2.0
      RESULT EQU 30H
      ORG 0
      LJMP MAIN
      ORG 0100H
MAIN: MOV A,#0AH
      MOV RESULT,A
      MOV RESULT+1,A
      MOV RESULT+2,A
      MOV RESULT+3,A
      MOV DPTR,#TAB
      MOV R0,#0
      MOV R1,#0FFH
LOOP: LCALL CCBINTOBCD
      LCALL DISP
      LCALL DELAY
      INC R0
      DJNZ R1,LOOP
      LJMP MAIN

      ;RESULT=30
      ;RESULT+1=31
      ;RESULT+2=32
      ;RESULT+3=33
        
CCBINTOBCD:MOV A,R0
        CJNE A,#100,BIJIAO
        MOV RESULT+1,#1
        MOV RESULT+2,#0
        MOV RESULT+3,#0
        LJMP EXIT

BIJIAO: JNC CBINTOBCD
        CJNE A,#10,BIJIAO1
        MOV RESULT+2,#1
        MOV RESULT+3,#0
        LJMP EXIT
BIJIAO1:JNC BINTOBCD
        MOV RESULT+3,A
        LJMP EXIT

CBINTOBCD: 
        MOV   B,#100
        DIV   AB
        MOV   RESULT+1,A
        MOV   A,B
BINTOBCD: MOV   B,#10
        DIV   AB
        MOV   RESULT+2,A
        MOV   RESULT+3,B
EXIT:   RET


DISP:MOV A,RESULT+3
     LCALL SEND
     MOV A,RESULT+2
     LCALL SEND
     MOV A,RESULT+1
     LCALL SEND
     MOV A,RESULT
     LCALL SEND
     RET
 
SEND:MOVC A,@A+DPTR
     MOV R2,#08H
DISP2:RLC A
     MOV DIN,C
     CLR CLK
     SETB CLK
     DJNZ R2,DISP2
     RET

DELAY:MOV   R4,  #03H
BB:   MOV   R5,  #0FFH
BB1:  MOV   R6,  #0FFH
BB2:  DJNZ  R6,  BB2
      DJNZ  R5,  BB1
      DJNZ  R4,  BB
      RET


TAB: DB 0C0H,0F9H,0A4H,0B0H,99H,92H,82H,0F8H,80H,90H,0FFH;0123456789空

     END