📄 prev_cmp_jtdkz.map.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Web Edition " "Info: Version 7.1 Build 156 04/30/2007 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Nov 29 22:48:34 2007 " "Info: Processing started: Thu Nov 29 22:48:34 2007" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off JTDKZ -c JTDKZ " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off JTDKZ -c JTDKZ" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "JTDKZ.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file JTDKZ.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 JTDKZ-behav " "Info: Found design unit 1: JTDKZ-behav" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 15 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 JTDKZ " "Info: Found entity 1: JTDKZ" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 4 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "JTDKZ " "Info: Elaborating entity \"JTDKZ\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "CNT1\[0\]~16 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"CNT1\[0\]~16\"" { } { { "JTDKZ.vhd" "CNT1\[0\]~16" { Text "D:/EDA/traffic/JTDKZ.vhd" 25 -1 0 } } } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0} } { } 0 0 "Inferred %1!d! megafunctions from design logic" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../quartus7.1/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../quartus7.1/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" { } { { "lpm_counter.tdf" "" { Text "d:/quartus7.1/quartus/libraries/megafunctions/lpm_counter.tdf" 248 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:CNT1_rtl_0 " "Info: Elaborated megafunction instantiation \"lpm_counter:CNT1_rtl_0\"" { } { } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../quartus7.1/quartus/libraries/megafunctions/alt_counter_f10ke.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../quartus7.1/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_f10ke " "Info: Found entity 1: alt_counter_f10ke" { } { { "alt_counter_f10ke.tdf" "" { Text "d:/quartus7.1/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" 268 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_counter:CNT1_rtl_0\|alt_counter_f10ke:wysi_counter lpm_counter:CNT1_rtl_0 " "Info: Elaborated megafunction instantiation \"lpm_counter:CNT1_rtl_0\|alt_counter_f10ke:wysi_counter\", which is child of megafunction instantiation \"lpm_counter:CNT1_rtl_0\"" { } { { "lpm_counter.tdf" "" { Text "d:/quartus7.1/quartus/libraries/megafunctions/lpm_counter.tdf" 432 4 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_counter:CNT1_rtl_0 " "Info: Instantiated megafunction \"lpm_counter:CNT1_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 4 " "Info: Parameter \"LPM_WIDTH\" = \"4\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION DOWN " "Info: Parameter \"LPM_DIRECTION\" = \"DOWN\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_COUNTER " "Info: Parameter \"LPM_TYPE\" = \"LPM_COUNTER\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} } { } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "M1\[3\] M1\[0\] " "Info: Duplicate register \"M1\[3\]\" merged to single register \"M1\[0\]\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 45 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "M0\[0\] M1\[0\] " "Info: Duplicate register \"M0\[0\]\" merged to single register \"M1\[0\]\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 45 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "M0\[1\] M1\[0\] " "Info: Duplicate register \"M0\[1\]\" merged to single register \"M1\[0\]\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 45 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "M0\[3\] M1\[0\] " "Info: Duplicate register \"M0\[3\]\" merged to single register \"M1\[0\]\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 45 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "CR1 MR1 " "Info: Duplicate register \"CR1\" merged to single register \"MR1\", power-up level changed" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 20 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0 "" 0} } { } 0 0 "Duplicate registers merged to single register" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|JTDKZ\|state 4 " "Info: State machine \"\|JTDKZ\|state\" contains 4 states" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|JTDKZ\|state " "Info: Selected Auto state machine encoding method for state machine \"\|JTDKZ\|state\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|JTDKZ\|state " "Info: Encoding result for state machine \"\|JTDKZ\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.s3 " "Info: Encoded state bit \"state.s3\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.s2 " "Info: Encoded state bit \"state.s2\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.s1 " "Info: Encoded state bit \"state.s1\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.s0 " "Info: Encoded state bit \"state.s0\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} } { } 0 0 "Completed encoding using %1!d! state bits" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|JTDKZ\|state.s0 0000 " "Info: State \"\|JTDKZ\|state.s0\" uses code string \"0000\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|JTDKZ\|state.s1 0011 " "Info: State \"\|JTDKZ\|state.s1\" uses code string \"0011\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|JTDKZ\|state.s2 0101 " "Info: State \"\|JTDKZ\|state.s2\" uses code string \"0101\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|JTDKZ\|state.s3 1001 " "Info: State \"\|JTDKZ\|state.s3\" uses code string \"1001\"" { } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} } { { "JTDKZ.vhd" "" { Text "D:/EDA/traffic/JTDKZ.vhd" 17 -1 0 } } } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "68 " "Info: Implemented 68 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "2 " "Info: Implemented 2 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "14 " "Info: Implemented 14 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "52 " "Info: Implemented 52 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "152 " "Info: Allocated 152 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Nov 29 22:48:39 2007 " "Info: Processing ended: Thu Nov 29 22:48:39 2007" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
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