📄 rs.mdl
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Name "CLK"
Position [55, 142, 105, 168]
FontSize 20
Port "3"
PortWidth "-1"
SampleTime "-1"
DataType "auto"
SignalType "auto"
Interpolate on
}
Block {
BlockType Constant
Name "Constant"
Position [640, 145, 680, 185]
Orientation "left"
FontSize 20
Value "0"
}
Block {
BlockType Logic
Name "Logical\nOperator"
Ports [2, 1, 0, 0, 0]
Position [210, 28, 290, 92]
FontSize 20
Operator "NAND"
Inputs "2"
}
Block {
BlockType Logic
Name "Logical\nOperator1"
Ports [2, 1, 0, 0, 0]
Position [210, 258, 285, 327]
FontSize 20
Operator "NAND"
Inputs "2"
}
Block {
BlockType Logic
Name "Logical\nOperator2"
Ports [2, 1, 0, 0, 0]
Position [355, 46, 430, 104]
FontSize 20
Operator "NAND"
Inputs "2"
}
Block {
BlockType Logic
Name "Logical\nOperator3"
Ports [2, 1, 0, 0, 0]
Position [360, 248, 445, 312]
FontSize 20
Operator "NAND"
Inputs "2"
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1, 0, 0, 0]
Position [465, 142, 500, 173]
Orientation "left"
NamePlacement "alternate"
ShowName off
FontSize 20
IconShape "rectangular"
Inputs "++"
SaturateOnIntegerOverflow on
}
Block {
BlockType Sum
Name "Sum1"
Ports [2, 1, 0, 0, 0]
Position [465, 192, 500, 223]
Orientation "left"
NamePlacement "alternate"
ShowName off
FontSize 20
IconShape "rectangular"
Inputs "++"
SaturateOnIntegerOverflow on
}
Block {
BlockType Outport
Name "Q"
Position [610, 62, 655, 88]
FontSize 20
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Outport
Name "/Q"
Position [620, 265, 670, 295]
FontSize 20
Port "2"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Outport
Name "Q1"
Position [770, 12, 815, 38]
FontSize 20
Port "3"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Outport
Name "Q2"
Position [445, 397, 490, 423]
FontSize 20
Port "4"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "S"
SrcPort 1
DstBlock "Logical\nOperator"
DstPort 1
}
Line {
SrcBlock "CLK"
SrcPort 1
Points [65, 0]
Branch {
Points [0, 120]
DstBlock "Logical\nOperator1"
DstPort 1
}
Branch {
Points [0, -80]
DstBlock "Logical\nOperator"
DstPort 2
}
}
Line {
SrcBlock "R"
SrcPort 1
DstBlock "Logical\nOperator1"
DstPort 2
}
Line {
SrcBlock "Logical\nOperator1"
SrcPort 1
Points [20, 0]
Branch {
DstBlock "Logical\nOperator3"
DstPort 2
}
Branch {
Points [0, 115]
DstBlock "Q2"
DstPort 1
}
}
Line {
SrcBlock "Logical\nOperator"
SrcPort 1
Points [35, 0]
Branch {
DstBlock "Logical\nOperator2"
DstPort 1
}
Branch {
Points [0, -35]
DstBlock "Q1"
DstPort 1
}
}
Line {
SrcBlock "Logical\nOperator2"
SrcPort 1
Points [95, 0]
Branch {
DstBlock "Q"
DstPort 1
}
Branch {
Points [0, 75]
DstBlock "Sum"
DstPort 1
}
}
Line {
SrcBlock "Sum"
SrcPort 1
Points [-120, 0; 0, 105]
DstBlock "Logical\nOperator3"
DstPort 1
}
Line {
SrcBlock "Logical\nOperator3"
SrcPort 1
Points [95, 0]
Branch {
DstBlock "/Q"
DstPort 1
}
Branch {
Points [0, -65]
DstBlock "Sum1"
DstPort 2
}
}
Line {
SrcBlock "Sum1"
SrcPort 1
Points [-145, 0; 0, -120]
DstBlock "Logical\nOperator2"
DstPort 2
}
Line {
SrcBlock "Constant"
SrcPort 1
Points [-75, 0]
Branch {
Points [0, 35]
DstBlock "Sum1"
DstPort 1
}
Branch {
DstBlock "Sum"
DstPort 2
}
}
Annotation {
Position [315, 44]
Text "Q1"
FontSize 20
}
Annotation {
Position [304, 280]
Text "Q2"
FontSize 20
}
}
}
Block {
BlockType Switch
Name "Switch"
Position [360, 81, 390, 149]
FontSize 20
Threshold "7.8"
}
Block {
BlockType Switch
Name "Switch1"
Position [360, 245, 390, 315]
FontSize 20
Threshold "7.8"
}
Line {
SrcBlock "Step1"
SrcPort 1
Points [50, 0; 0, -35]
DstBlock "Switch"
DstPort 3
}
Line {
SrcBlock "Step"
SrcPort 1
DstBlock "Switch1"
DstPort 3
}
Line {
SrcBlock "Clock"
SrcPort 1
Points [35, 0]
Branch {
DstBlock "Switch"
DstPort 2
}
Branch {
Points [0, 165]
DstBlock "Switch1"
DstPort 2
}
}
Line {
SrcBlock "Pulse\nGenerator"
SrcPort 1
Points [0, 30]
Branch {
Points [290, 0; 0, 50]
DstBlock "Scope"
DstPort 1
}
Branch {
Points [0, 135]
DstBlock "SubSystem"
DstPort 3
}
}
Line {
SrcBlock "Switch"
SrcPort 1
Points [35, 0]
Branch {
Points [0, 40]
DstBlock "SubSystem"
DstPort 1
}
Branch {
Points [250, 0; 0, 60]
DstBlock "Scope"
DstPort 2
}
}
Line {
Labels [1, 0]
SrcBlock "Switch1"
SrcPort 1
Points [30, 0]
Branch {
Points [0, -90]
DstBlock "SubSystem"
DstPort 2
}
Branch {
Points [250, 0; 0, -70]
DstBlock "Scope"
DstPort 3
}
}
Line {
SrcBlock "SubSystem"
SrcPort 3
Points [55, 0; 0, 45]
DstBlock "Scope"
DstPort 4
}
Line {
SrcBlock "SubSystem"
SrcPort 4
Points [35, 0; 0, 75; 160, 0; 0, -20]
DstBlock "Scope"
DstPort 5
}
Line {
SrcBlock "SubSystem"
SrcPort 1
Points [115, 0; 0, 165]
DstBlock "Scope"
DstPort 6
}
Line {
SrcBlock "SubSystem"
SrcPort 2
Points [85, 0; 0, 175]
DstBlock "Scope"
DstPort 7
}
Line {
SrcBlock "Constant"
SrcPort 1
Points [50, 0; 0, 45]
DstBlock "Switch"
DstPort 1
}
Line {
SrcBlock "Constant1"
SrcPort 1
Points [60, 0; 0, 20]
DstBlock "Switch1"
DstPort 1
}
}
}
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