reg.h

CP2201和51单片机实现ARP ICMP IP UDP协议

#define TXSTA5      XBYTE[0x805D]   // Transmit Status Vector 5                           
#define TXSTA4      XBYTE[0x805E]   // Transmit Status Vector 4                           
#define TXSTA3      XBYTE[0x805F]   // Transmit Status Vector 3                           
#define TXSTA2      XBYTE[0x8060]   // Transmit Status Vector 2                           
#define TXSTA1      XBYTE[0x8061]   // Transmit Status Vector 1                           
#define TXSTA0      XBYTE[0x8062]   // Transmit Status Vector 0                           
#define PHYCN       XBYTE[0x8078]   // Physical Layer Control                             
#define PHYCF       XBYTE[0x8079]   // Physical Layer Configuration                       
#define PHYSTA      XBYTE[0x8080]   // Physical Layer Status                              
#define TXPWR       XBYTE[0x807A]   // Transmitter Power Register                         

//-----------------------------------------------------------------------------
// Bit Definitions
//-----------------------------------------------------------------------------
           
// TLB0INFOH Bit Definitions
#define  RXVALID        0x80
#define  RXVLAN         0x40
#define  RXUNSUP        0x20
#define  RXPCF          0x10
#define  RXCF           0x08
#define  RXADATA        0x04
#define  BCAST          0x02
#define  MCAST          0x01

// TLB0INFOL Bit Definitions
#define  RXOK           0x80
#define  LENGTH         0x40
#define  LENERR         0x20
#define  CRCERR         0x10
#define  RXVLT          0x08
#define  RXLEN          0x02
#define  RXDROP         0x01

// INT0 Bit Definitions
#define  EEOPINT         0x80
#define  ERXEINT         0x40
#define  ESELFINT        0x20
#define  EOSCINT         0x10
#define  EFLWEINT        0x08
#define  ETXINT          0x04
#define  ERXFINT         0x02
#define  ERXINT          0x01

// INT0EN Bit Definitions
#define  EOPINT         0x80
#define  RXEINT         0x40
#define  SELFINT        0x20
#define  OSCINT         0x10
#define  FLWEINT        0x08
#define  TXINT          0x04
#define  RXFINT         0x02
#define  RXINT          0x01

// INT1 Bit Definitions
#define  WAKEINT        0x20
#define  LINKINT        0x10
#define  JABINT         0x08
#define  ANFINT         0x04
#define  RFINT          0x02
#define  ANCINT         0x01

// INT1EN Bit Definitions
#define  EWAKEINT        0x20
#define  ELINKINT        0x10
#define  EJABINT         0x08
#define  EANFINT         0x04
#define  ERFINT          0x02
#define  EANCINT         0x01

// RXCN Bit Definitions
#define  RXINH          0x08
#define  RXCLRV         0x04
#define  RXSKIP         0x02
#define  RXCLEAR        0x01

// TXCN Bit Definitions
#define  OVRRIDE        0x80
#define  CRCENOV        0x20
#define  PADENOV        0x10
#define  TXPPKT         0x08
#define  BCKPRES        0x04
#define  FDPLXOV        0x02
#define  TXGO           0x01

// PHYCN Bit Definitions
#define  PHYEN          0x80
#define  PHYTXEN           0x40
#define  PHYRXEN           0x20
#define  DPLXMD         0x10
#define  LBMD           0x08
#define  LPRFAULT       0x04
#define  POLREV         0x02
#define  LINKSTA        0x01

// PHYCF Bit Definitions
#define  SMSQ           0x80
#define  LINKINTG       0x40
#define  JABBER         0x20
#define  AUTONEG        0x10
#define  ADRFAULT       0x08
#define  ADPAUSE        0x04
#define  AUTOPOL        0x02
#define  REVPOL         0x01

// MACCN Bit Definitions
#define  RANDRST        0x4000
#define  LOOPBCK        0x0010
#define  TXPAUSE        0x0008
#define  RXPAUSE        0x0004
#define  PASSALL        0x0002
#define  RCVEN          0x0001

// MACCF Bit Definitions
#define  ABORTD         0x4000
#define  EBBPD          0x2000
#define  EBD            0x1000
#define  RLPRE          0x0200
#define  PUREPRE        0x0100
#define  PADMD1         0x0080
#define  PADMD0         0x0040
#define  PADEN          0x0020
#define  CRCEN          0x0010
#define  PHEADER        0x0008
#define  LENCHK         0x0002
#define  FLLDPLX        0x0001

#define OSC_ERROR   0x01               // Error Return Codes
#define CAL_ERROR   0x02
#define MEM_ERROR   0x04
#define FLASH_ERROR 0x08
#define MAC_ERROR   0x10
#define LINK_ERROR  0x20
#define DATA_ERROR  0x40

#endif