📄 parmem.sdi
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,,,;
,,,; PARMEM.ASM MPB Ver:1.0 6-9-05
,,,;...............................................................
,,,;
,,,; Parallel memory system
,,,; Status: Complete
,,,;
,,,; PIC 16F877 operates with expansion memory RAM
,,,; = 2 x 62256 32kb
,,,; Control bits = Port B
,,,; Data bus = Port C
,,,; Address Bus = Port D
,,,;
,,,;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
,,,
,,, PROCESSOR 16F877 ; define MPU
00002007,3731,, __CONFIG 0x3731 ; XT clock
,,,
,,,; LABEL EQUATES ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
,,,
,,, INCLUDE "P16F877.INC" ; Standard register labels
,,,
,,,ConReg EQU 06 ; Port B = Control Register
,,,DatReg EQU 07 ; Port C = Data Register
,,,AddReg EQU 08 ; Port D = Address Register
,,,
,,,HiAdd EQU 20 ; High address store
,,,
,,,CLK0 EQU 0 ; RAM0 address buffer clock
,,,CLK1 EQU 1 ; RAM1 address buffer clock
,,,SelRAM EQU 2 ; RAM select bit
,,,ResHi EQU 3 ; High address reset bit
,,,WritEn EQU 4 ; Write enable bit
,,,OutEn0 EQU 5 ; Output enable bit RAM0
,,,OutEn1 EQU 6 ; Output enable bit RAM1
,,,LED EQU 7 ; Memory error indicator
,,,
,,,
,,,
,,,; Initialise ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
,,,
,,, ORG 0 ; Place machine code
00000000,0000,, NOP ; Required for ICD mode
,,,
00000001,1683 1303,, BANKSEL TRISB ; Select bank 1
00000003,0186,, CLRF TRISB ; Control output bits
00000004,0187,, CLRF TRISC ; Data bus initially output
00000005,0188,, CLRF TRISD ; Address bus output
,,,
00000006,1283 1303,, BANKSEL AddReg ; Select bank 0
00000008,0187,, CLRF DatReg ; Clear outputs initially
00000009,0188,, CLRF AddReg ; Clear outputs initially
,,,
0000000A,1006,, BCF ConReg,CLK0 ; RAM0 address buffer clock
0000000B,1086,, BCF ConReg,CLK1 ; RAM1 address buffer clock
0000000C,1106,, BCF ConReg,SelRAM ; Select RAM0 initially
0000000D,1186,, BCF ConReg,ResHi ; Reset high address latches
0000000E,1686,, BSF ConReg,OutEn0 ; Disable output enable RAM0
0000000F,1706,, BSF ConReg,OutEn1 ; Disable output enable RAM1
00000010,1606,, BSF ConReg,WritEn ; Disable write enable bit
00000011,1386,, BCF ConReg,LED ; Switch of error indicator
,,,
,,,
,,,
,,,; MAIN LOOP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
,,,
00000012,2015,start,start CALL write ; test write to memory
00000013,201F,, CALL read ; test read from memory
00000014,0063,, SLEEP ; shut down
,,,
,,,
,,,; Write checkerboard pattern to both RAMs ;;;;;;;;;;;;;;;;;;;;;;;
,,,
00000015,1586,write,write BSF ConReg,ResHi ; Enable address latches
,,,
00000016,3055,nexwrt,nexwrt MOVLW 055 ; checkerboard test data
00000017,0087,, MOVWF DatReg ; output on data bus
00000018,2035,, CALL store ; and write to RAM
,,,
00000019,30AA,, MOVLW 0AA ; checkerboard test data
0000001A,0087,, MOVWF DatReg ; output on data bus
0000001B,2035,, CALL store ; and write to RAM
,,,
0000001C,1D86,, BTFSS ConReg,ResHi ; all done?
0000001D,0008,, RETURN ; yes - quit
0000001E,2816,, GOTO nexwrt ; no - next byte pair
,,,
,,,
,,,; Check data stored ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
,,,
0000001F,0000,read,read NOP ; required for label
00000020,1683 1303,, BANKSEL TRISC ; select bank 1
00000022,30FF,, MOVLW 0FF ; all inputs..
00000023,0087,, MOVWF TRISC ; ..at Port C
,,,
00000024,1283 1303,, BANKSEL ConReg ; select default bank 0
00000026,1586,, BSF ConReg,ResHi ; Enable address latches
,,,
00000027,1106,, BCF ConReg,SelRAM ; select RAM0
00000028,1286,, BCF ConReg,OutEn0 ; set RAM0 for output
00000029,202E,, CALL nexred ; check data in RAM0
,,,
0000002A,1506,, BSF ConReg,SelRAM ; select RAM0
0000002B,1306,, BCF ConReg,OutEn1 ; set RAM0 for output
0000002C,202E,, CALL nexred ; check data in RAM0
,,,
0000002D,0008,, RETURN ; all done
,,,
,,,
,,,; Load test data and check data ................................
,,,
0000002E,3055,nexred,nexred MOVLW 055 ; load even data byte
0000002F,203F,, CALL test ; check data
00000030,30AA,, MOVLW 0AA ; load odd data byte
00000031,203F,, CALL test ; check data
,,,
00000032,1D86,, BTFSS ConReg,ResHi ; all done?
00000033,0008,, RETURN ; yes - quit
00000034,282E,, GOTO nexred ; no - next byte pair
,,,
,,,
,,,; Write data to RAM .............................................
,,,
00000035,1106,store,store BCF ConReg,SelRAM ; no - Select RAM0
00000036,1206,, BCF ConReg,WritEn ; negative pulse ..
00000037,1606,, BSF ConReg,WritEn
,,,
00000038,1506,, BSF ConReg,SelRAM ; Select RAM1
00000039,1206,, BCF ConReg,WritEn ; negative pulse ..
0000003A,1606,, BSF ConReg,WritEn ; ..write bit
,,,
0000003B,0A88,, INCF AddReg ; next address
0000003C,1903,, BTFSC STATUS,Z ; last address?
0000003D,2047,, CALL inchi ; yes - increment high address
0000003E,0008,, RETURN ; no - next byte
,,,
,,,
,,,; Test memory data ..............................................
,,,
0000003F,0887,test,test MOVF DatReg,F ; read data
00000040,0207,, SUBWF DatReg,W ; compare data
00000041,1D03,, BTFSS STATUS,Z ; same?
00000042,1786,, BSF ConReg,LED ; no - switch on LED
,,,
00000043,0A88,, INCF AddReg ; yes - next address
00000044,1903,, BTFSC STATUS,Z ; last address in block?
00000045,2047,, CALL inchi ; yes - increment high address
00000046,0008,, RETURN ; no - continue
,,,
,,,
,,,; Select next block of RAM ......................................
,,,
00000047,0AA0,inchi,inchi INCF HiAdd ; next block
00000048,1903,, BTFSC STATUS,Z ; all done?
00000049,2852,, GOTO alldon ; yes
,,,
0000004A,0820,, MOVF HiAdd,W ; no - load high address
0000004B,0088,, MOVWF AddReg ; output it
,,,
0000004C,1406,, BSF ConReg,CLK0 ; clock it into latches
0000004D,1486,, BSF ConReg,CLK1
0000004E,1006,, BCF ConReg,CLK0
0000004F,1086,, BCF ConReg,CLK1
,,,
00000050,0188,, CLRF AddReg ; reset low address to zero
00000051,0008,, RETURN ; block done
,,,
00000052,1186,alldon,alldon BCF ConReg,ResHi ; reset address latches
00000053,0008,, RETURN ; all blocks done
,,,
,,, END ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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