📄 davincievm_arm.gel
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/* ------------------------------------------------------------------------ *
* *
* DaVinciEVM_arm.gel *
* Version 3.00 *
* *
* This GEL file is designed to be used in conjunction with *
* CCS 3.2X and the Davinci based EVM. *
* *
* ------------------------------------------------------------------------ */
/* ------------------------------------------------------------------------ *
* *
* StartUp( ) *
* *
* Setup Memory Map *
* *
* ------------------------------------------------------------------------ */
StartUp( )
{
//setup_memory_map_arm( );
clear_memory_map_arm( );
}
/* ------------------------------------------------------------------------ *
* *
* OnTargetConnect( ) *
* *
* Setup PinMux, Power, PLLs, DDR, & EMIFs *
* *
* ------------------------------------------------------------------------ */
OnTargetConnect( )
{
setup_pin_mux( ); // Setup Pin Mux
//turn_on_dsp( ); // Turn on DSP
setup_psc_all_on( ); // Setup PSC
setup_pll_1( 0, 16 ); // Setup Pll1 ( Clk @ 459 MHz )
//setup_pll_1( 0, 21 ); // Setup Pll1 ( Clk @ 594 MHz )
//setup_pll_2( 0, 27, 13, 2 ); // Setup Pll2 ( DDR @ 126 MHz )
setup_pll_2( 0, 19, 9, 1 ); // Setup Pll2 ( DDR @ 135 MHz )
setup_ddr2( ); // Setup DDR2
setup_general_16bit_emif( ); // Setup AEMIF
GEL_TextOut( "\nStartup Complete\n\n" );
}
/* ------------------------------------------------------------------------ *
* *
* setup_memory_map_arm( ) *
* *
* Setup the Memory Map for ARM side only. *
* *
* ------------------------------------------------------------------------ */
setup_memory_map_arm( )
{
GEL_MapOn( );
GEL_MapReset( );
/* RAM/ROM memory map */
GEL_MapAddStr( 0x00000000, 0, 0x00004000, "R|W|AS4", 0 ); // ARM Instruction RAM
GEL_MapAddStr( 0x00004000, 0, 0x00004000, "R|AS4", 0 ); // ARM Instruction ROM
GEL_MapAddStr( 0x00008000, 0, 0x00004000, "R|W|AS4", 0 ); // ARM Data RAM
GEL_MapAddStr( 0x0000C000, 0, 0x00004000, "R|AS4", 0 ); // ARM Data ROM
/* Extend Trace memory map */
GEL_MapAddStr( 0x01BC0000, 0, 0x00001900, "R|W|AS4", 0 ); // ARM ETB
/* Peripheral memory map */
GEL_MapAddStr( 0x01C00000, 0, 0x00010000, "R|W|AS4", 0 ); // EDMA CC
GEL_MapAddStr( 0x01C10000, 0, 0x00000400, "R|W|AS4", 0 ); // EDMA TC0
GEL_MapAddStr( 0x01C10400, 0, 0x00000400, "R|W|AS4", 0 ); // EDMA TC1
GEL_MapAddStr( 0x01C20000, 0, 0x00000034, "R|W|AS4", 0 ); // UART 0
GEL_MapAddStr( 0x01C20400, 0, 0x00000034, "R|W|AS4", 0 ); // UART 1
GEL_MapAddStr( 0x01C20800, 0, 0x00000034, "R|W|AS4", 0 ); // UART 2
GEL_MapAddStr( 0x01C21000, 0, 0x00000060, "R|W|AS4", 0 ); // I2C
GEL_MapAddStr( 0x01C21400, 0, 0x0000002C, "R|W|AS4", 0 ); // Timer 0/1
GEL_MapAddStr( 0x01C21800, 0, 0x0000002C, "R|W|AS4", 0 ); // Timer 2/3
GEL_MapAddStr( 0x01C21C00, 0, 0x0000002C, "R|W|AS4", 0 ); // Watchdog Timer
GEL_MapAddStr( 0x01C22000, 0, 0x0000001C, "R|W|AS4", 0 ); // PWM 0
GEL_MapAddStr( 0x01C22400, 0, 0x0000001C, "R|W|AS4", 0 ); // PWM 1
GEL_MapAddStr( 0x01C22800, 0, 0x0000001C, "R|W|AS4", 0 ); // PWM 2
GEL_MapAddStr( 0x01C40000, 0, 0x00000264, "R|W|AS4", 0 ); // System Module
GEL_MapAddStr( 0x01C40800, 0, 0x00000174, "R|W|AS4", 0 ); // PLL 1
GEL_MapAddStr( 0x01C40C00, 0, 0x00000174, "R|W|AS4", 0 ); // PLL 2
GEL_MapAddStr( 0x01C41000, 0, 0x00000AA8, "R|W|AS4", 0 ); // Power Sleep Controller
GEL_MapAddStr( 0x01C48000, 0, 0x00000050, "R|W|AS4", 0 ); // ARM Interrupts
GEL_MapAddStr( 0x01C60000, 0, 0x00004000, "R|W|AS4", 0 ); // IEEE 1394
GEL_MapAddStr( 0x01C64000, 0, 0x00002000, "R|W|AS4", 0 ); // USB 2.0 OTG
GEL_MapAddStr( 0x01C66000, 0, 0x00000800, "R|W|AS2", 0 ); // ATA / CF
GEL_MapAddStr( 0x01C66800, 0, 0x00000074, "R|W|AS4", 0 ); // SPI
GEL_MapAddStr( 0x01C67000, 0, 0x00000038, "R|W|AS4", 0 ); // GPIO
GEL_MapAddStr( 0x01C67800, 0, 0x00000104, "R|W|AS4", 0 ); // UHPI
GEL_MapAddStr( 0x01C70000, 0, 0x00004000, "R|W|AS4", 0 ); // VPSS
GEL_MapAddStr( 0x01C80000, 0, 0x00001000, "R|W|AS4", 0 ); // EMAC Control
GEL_MapAddStr( 0x01C81000, 0, 0x00001000, "R|W|AS4", 0 ); // EMAC Wrapper
GEL_MapAddStr( 0x01C82000, 0, 0x00002000, "R|W|AS4", 0 ); // EMAC Wrapper RAM
GEL_MapAddStr( 0x01C84000, 0, 0x00000090, "R|W|AS4", 0 ); // MDIO
GEL_MapAddStr( 0x01CC0000, 0, 0x00020000, "R|W|AS4", 0 ); // Image Coprocessor
GEL_MapAddStr( 0x01E00000, 0, 0x000000b4, "R|W|AS4", 0 ); // AEMIF Control
GEL_MapAddStr( 0x01E01000, 0, 0x00000560, "R|W|AS4", 0 ); // VYLNQ Control
GEL_MapAddStr( 0x01E02000, 0, 0x0000005C, "R|W|AS4", 0 ); // McBSP
GEL_MapAddStr( 0x01E10000, 0, 0x00000078, "R|W|AS4", 0 ); // MMC / SD
GEL_MapAddStr( 0x01E20000, 0, 0x00000024, "R|W|AS4", 0 ); // Memory Stick / Pro
/* Off-chip memory map */
GEL_MapAddStr( 0x02000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS2
GEL_MapAddStr( 0x04000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS3
GEL_MapAddStr( 0x06000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS4
GEL_MapAddStr( 0x08000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS5
GEL_MapAddStr( 0x0C000000, 0, 0x04000000, "R|W|AS4", 0 ); // VLYNQ Remote
/* DSP RAM memory map */
GEL_MapAddStr( 0x11100000, 0, 0x00100000, "R|W|AS4", 0 ); // DSP UMAP1 ImgCop
GEL_MapAddStr( 0x11800000, 0, 0x00010000, "R|W|AS4", 0 ); // DSP UMAP0 L2 Cache
GEL_MapAddStr( 0x11E08000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1P Cache
GEL_MapAddStr( 0x11F04000, 0, 0x0000C000, "R|W|AS4", 0 ); // DSP L1D RAM
GEL_MapAddStr( 0x11F10000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1D Cache
/* DDR2 memory map */
GEL_MapAddStr( 0x20000000, 0, 0x000000E8, "R|W|AS4", 0 ); // DDR2 Control
GEL_MapAddStr( 0x80000000, 0, 0x10000000, "R|W|AS4", 0 ); // DDR2 SDRAM
}
clear_memory_map_arm( )
{
GEL_MapOff( );
}
sw_wait( int delay )
{
int i;
for( i = 0 ; i < delay ; i++ ){}
}
/* ------------------------------------------------------------------------ *
* *
* setup_pin_mux( ) *
* *
* *
* ------------------------------------------------------------------------ */
setup_pin_mux( )
{
#define PINMUX0 *( unsigned int* )( 0x01C40000 )
#define PINMUX1 *( unsigned int* )( 0x01C40004 )
#define VDD3P3V_PWDN *( unsigned int* )( 0x01C40048 )
PINMUX0 = 0x80000C1F;
/*
| ( 1 << 31 ) // EMACEN
| ( 0 << 30 ) // EN1394
| ( 0 << 29 ) // HPIEN
| ( 0 << 27 ) // CFLDEN
| ( 0 << 26 ) // CWEN
| ( 0 << 25 ) // LFLDEN
| ( 0 << 24 ) // LOEEN
| ( 0 << 23 ) // RGB888
| ( 0 << 22 ) // RGB666
| ( 0 << 17 ) // ATAEN
| ( 0 << 16 ) // HDIREN
| ( 0 << 15 ) // VLYNQEN
| ( 0 << 14 ) // VLSCREN
| ( 0 << 12 ) // VLYNQWD
| ( 1 << 11 ) // AECS5
| ( 1 << 10 ) // AECS4
| ( 31 << 0 ) // AEAW
*/
PINMUX1 = 0x000404F1;
/*
| ( 1 << 18 ) // TIMIN
| ( 0 << 17 ) // CLK1
| ( 0 << 16 ) // CLK0
| ( 1 << 10 ) // MCBSP
| ( 0 << 9 ) // MSTK
| ( 0 << 8 ) // SPI
| ( 1 << 7 ) // I2C
| ( 1 << 6 ) // PWM2
| ( 1 << 5 ) // PWM1
| ( 1 << 4 ) // PWM0
| ( 0 << 3 ) // U2FLO
| ( 0 << 2 ) // UART2
| ( 0 << 1 ) // UART1
| ( 1 << 0 ) // UART0
*/
VDD3P3V_PWDN = 0;
/*
| ( 0 << 1 ) // MMC/SD/MS I/O cells [Normal]
| ( 0 << 0 ) // EMAC I/O cells [Normal]
*/
}
/* ------------------------------------------------------------------------ *
* *
* setup_pll_on( ) *
* *
* Setup either PLL1 or PLL2 *
* *
* pll_number <- 1: PLL1 *
* 2: PLL2 *
* *
* clock_source <- 0: Onchip Oscillator *
* 1: External Oscillator *
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