adcm2650_hw.h

pxa270下的摄像头mtd91111的驱动

/*
 *  mt9d011_hw.h
 *
 *  mt9d011 Camera Module driver.
 *
 *  Copyright (C) 2005, Nanwang Corporation
 *
 *  Author: nanwang Inc.
 *          yulu
 *
 */

/*#ifndef _PXA_MT9D011_HW_H__
#define _PXA_MT9D011_HW_H__*/

#ifndef _PXA_ADCM_2650_HW_H__
#define _PXA_ADCM_2650_HW_H__



/***********************************************************************
 *
 * Constants & Structures
 *
 ***********************************************************************/
typedef struct {
    u16 addr;
    u16 value;
} firm_update_t;

typedef struct {
    u16 width;
    u16 height;
} adcm_window_size;
//ADCM_WINDOWSIZE;  


// I2C address
#define READ_SLAVE_ADDR     0xba	//0x0090
#define WRITE_SLAVE_ADDR    0xba	//0x0090 0x0091

// Revision constants
#define CHIP_REV            0x1519	//mt9d111

// Calculating the Module Block Number
#define BLOCK(a)            (u8)((a) >> 7)        // register's module block address.
#define OFFSET(a)           (u8)((a) & 0x7F ) // register's offset to this block.

// Return codes
#define ADCM_ERR_NONE       0x00
#define ADCM_ERR_TIMEOUT    -1
#define ADCM_ERR_PARAMETER  -2  

// Others
#define adcm2650__TIMEOUT    1000    // ms to timeout.
#define BLOCK_SWITCH_CMD    ((u8)0xFE)        // Block Switch Code: 0x7F, CMD = Code << 1
#define CLOCK_13M   13
#define VOLTS_28    0x28


/***********************************************************************
 *
 * Register Offset
 *
 ***********************************************************************/
/*Sensor Core Registers,page 0*/
#define CHIP_VER            0x00
#define ROW_START           0x01
#define COL_START           0x02
#define ROW_WIDTH    		0x03
#define COL_WIDTH    		0x04
#define HORI_BLACK_CB       0x05
#define VERT_BLACK_CB     	0x06
#define HORI_BLACK_CA   	0x07
#define VERT_BLACK_CA   	0x08
#define SHUT_WIDTH   		0x09
#define ROW_SPEED      		0x0a
#define EXTRA_DELAY    		0x0b
#define SHUT_DELAY   		0x0c
#define RESET  				0x0d
#define FV_CTRL   			0x1f
#define RD_MD_CB    		0x20
#define RD_MD_CA    		0x21  
#define DARK_COLROW    		0x22  
#define FLASH   			0x23  
#define EXTRA_RESET   		0x24  
#define LV_CTRL 			0x25  
#define BTM_DARK_ROW  		0x26  
#define G1_GAIN  			0x2b  
#define B_GAIN  			0x2c  
#define R_GAIN  			0x2d
#define G2_GAIN  			0x2e
#define GLB_GAIN  			0x2f
#define ROW_NIOSE			0x30
#define BLACK_ROW  			0x59
#define DARK_G1_AVER  		0x5b
#define DARK_B_AVER  		0x5c
#define DARK_R_AVER  		0x5d
#define DARK_G2_AVER  		0x5e
#define CALIB_THRESHOLD		0x5f
#define CALIB_CTRL 			0x60
#define CALIB_G1 			0x61
#define CALIB_B 			0x62
#define CALIB_R 			0x63
#define CALIB_G2 			0x64
#define CLK_CTRL 			0x65
#define PLL_CTRL_1 			0x66
#define PLL_CTRL_2 			0x67
#define GLB_SHUT_CTRL 		0xc0
#define START_INTEGRATION 	0xc1
#define START_READOUT 		0xc2
#define ASSERT_STROBE 		0xc3
#define DEASSERT_STROE      0xc4
#define ASSERT_FLASH		0xc5
#define DEASSERT_FLASH		0xc6
#define EXTR_SAMPLE_1		0xe0
#define EXTR_SAMPLE_2		0xe1
#define EXTR_SAMPLE_3		0xe2
#define EXTR_SAMPLE_CTRL    0xe3
#define PAGE_REG    		0xf0
#define BYTEWISE_ADDR		0xf1
#define CONTEXT_CTRL		0xf2


/*IFP Registers,page1*/
#define COLOR_PIPELINE_CTRL	0x08
#define FACTORY_BYPASS		0x09
#define PAD_SLEW			0x0A
#define INTER_CLK_CTRL		0x0B
#define X0_CROP_WIN			0x11
#define X1_CROP_WINPLUS1	0x12
#define Y0_CROP_WIN			0x13
#define Y1_CROP_WINPLUS1	0x14
#define DECIMATOR_CTRL		0x15
#define WEIGHT_FOR_HORIZ	0x16
#define WEIGHT_FOR_VERT		0x17
#define VAR_ADDR			0xC6
#define VAR_DATA			0xC8
//#define PAGE_REG			0xF0
#define BYTEWISE_ADDR		0xF1







        
#if 0
/*IFP Registers,page2*/

#define 
#define 
#define 
#define 
#define 
#define 
#define 
#define JPEG_CTRL_REG		0x1E
#define JPEG_DATA_REG		0x1F
#define 
#define 
#define 
#define 
#define 
#define         
#define         
#define 
//#define PAGE_REG			0xF0
#define BYTEWISE_ADDR		0xF1       

     
/*JPEG Indirect Registers(IFP Registers ,page 2 30/31)*/
        
#endif      
        
/*Firmware Driver Variables(IFP Registers ,page1 198/200)*/
#define ID_MON				(0<<8)
#define ID_SEQ				(1<<8)
#define ID_AE				(2<<8)
#define ID_AWB				(3<<8)
#define ID_FD				(4<<8)
#define ID_AF				(5<<8)
#define ID_AFM				(6<<8)
#define ID_MODE				(7<<8)
#define ID_JPEG				(9<<8)
#define ID_HG				(11<<8)
#define ID_MON_EXT			(16<<8) 
#define ID_SEQ_EXT			(17<<8) 
#define ID_AE_EXT			(18<<8) 
#define ID_AWB_EXT			(19<<8) 
#define ID_FD_EXT			(20<<8) 
#define ID_AF_EXT			(21<<8) 
#define ID_AFM_EXT			(22<<8) 
#define ID_MODE_EXT			(23<<8) 
#define ID_JPEG_EXT			(25<<8) 
#define ID_HG_EXT			(26<<8)

#define VAR_PHY_ACCESS		0x0
#define VAR_LOGIC_ACCESS	(0x1<<13)
#define VAR_8_ACCESS		(0x1<<15)
#define VAR_16_ACCESS		0x0
        
        
      
        
        
        


/***********************************************************************
 *
 * Bit/Field definitions
 *
 ***********************************************************************/




/***********************************************************************
 *
 * Function Prototype
 *
 ***********************************************************************/
 

void i2c_init(void); 
void i2c_deinit(void);
int nw_camera_init(void);
int adcm2650_set_size( adcm_window_size * window );

int nw_i2c_init(void);
int iic_read(unsigned char dev_addr,unsigned char reg_addr);
int iic_write(unsigned char dev_addr,unsigned char reg_addr,unsigned short value);
int adcm2650_read(u16 addr, u16 *pvalue);
int adcm2650_write(u16 addr, u16 value);
void nw_set_clock(int pclk_enable, int mclk_enable, unsigned int mclk_khz);

int var_write16(u8 id, u16 offset, u16 value);
int var_write8(u8 id, u16 offset, u16 value);
int var_read8(u8 id, u16 offset);
int var_read16(u8 id, u16 offset);
#endif