📄 pci550x_dac0_clk.c
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device, brd_names[brd_type]); } /* DAC1 sync */ if (S) { rc = ioctl(fd, PCI550X_IOCT_DA1_STATUS_FFEN, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA1_STATUS_FFEN"); exit(1); } else { printf("%s:%s DAC1 FIFO enabled\n", device, brd_names[brd_type]); } } /* disable/enable packed data mode */ rc = ioctl(fd, PCI550X_IOCT_DA0_PDM, packed); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_PDM"); exit(1); } else { if (packed) printf("PDM enabled\n"); else printf("PDM disabled\n"); } /* DAC1 sync */ if (S) { rc = ioctl(fd, PCI550X_IOCT_DA1_PDM, packed); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA1_PDM"); exit(1); } else { if (packed) printf("PDM enabled\n"); else printf("PDM disabled\n"); } } /* enable DAC0 to do conversions */ rc = ioctl(fd, PCI550X_IOCT_DA0_CVEN, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_CVEN"); exit(1); } else { printf("%s:%s DAC0 enabled to do conversions\n", device, brd_names[brd_type]); } /* select bipolar/unipolar mode */ rc = ioctl(fd, PCI550X_IOCT_DA0_UB, bipolar); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_UB"); exit(1); } else { if (bipolar) { printf("%s:%s DAC0 Bipolar mode enabled\n", device, brd_names[brd_type]); } else { printf("%s:%s DAC0 Unipolar mode enabled\n", device, brd_names[brd_type]); } } /* DAC1 sync */ if (S) { rc = ioctl(fd, PCI550X_IOCT_DA1_UB, bipolar); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA1_UB"); exit(1); } else { if (bipolar) { printf("%s:%s DAC1 Bipolar mode enabled\n", device, brd_names[brd_type]); } else { printf("%s:%s DAC1 Unipolar mode enabled\n", device, brd_names[brd_type]); } } } /* select gate source for the onboard pacer clock */ if (g | G | t | T) { rc = ioctl(fd, PCI550X_IOCT_DA0_CGSL, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_CGSL"); exit(1); } else printf("DAC0 external "); if (g | G ) { rc = ioctl(fd, PCI550X_IOCT_DA0_TGSL, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_TGSL"); exit(1); } else printf("level "); if (G) { rc = ioctl(fd, PCI550X_IOCT_DA0_TGPL, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_TGPL"); exit(1); } else printf("(high) gate enabled\n"); g = PCI550X_DISABLE; } else { rc = ioctl(fd, PCI550X_IOCT_DA0_TGPL, PCI550X_DISABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_TGPL"); exit(1); } else printf("(low) gate enabled\n"); G = PCI550X_DISABLE; } t = T = PCI550X_DISABLE; } else { rc = ioctl(fd, PCI550X_IOCT_DA0_TGSL, PCI550X_DISABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_TGSL"); exit(1); } else printf("edge "); g = G = PCI550X_DISABLE; if (T) { rc = ioctl(fd, PCI550X_IOCT_DA0_TGPL, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_TGPL"); exit(1); } else printf("(rising) trigger enabled\n"); t = PCI550X_DISABLE; } else { rc = ioctl(fd, PCI550X_IOCT_DA0_TGPL, PCI550X_DISABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_TGPL"); exit(1); } else printf("(falling) trigger enabled\n"); T = PCI550X_DISABLE; } } } else { rc = ioctl(fd, PCI550X_IOCT_DA0_CGSL, PCI550X_DISABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_CGSL"); exit(1); } else printf("DAC0 Internal Software Gate enabled\n"); } /* set initial DAC value at minimum of the range */ if (packed && bipolar) { u1[i].bp_dac_fifo[0] = drt.bp_min; u1[i].bp_dac_fifo[1] = drt.bp_min + 1; } else if (packed && (!(bipolar))) { u1[i].up_dac_fifo[0] = drt.up_min; u1[i].up_dac_fifo[1] = drt.up_min + 1; } else if (bipolar) { u1[i].bp_dac_fifo[0] = drt.bp_min; u1[i].bp_dac_fifo[1] = 0; } else { u1[i].up_dac_fifo[0] = drt.up_min; u1[i].up_dac_fifo[1] = 0; } while(1) { /* DAC0 status */ rc = ioctl(fd, PCI550X_IOCG_DA0_STATUS, &dac0_status); if(rc == -1) { perror("ioctl PCI550X_IOCG_DA0_STATUS"); exit(1); } /* exit on errors */ if (dac0_status & DA0_STATUS_CERR) { printf("DAC0 clocking error\n"); exit(1); } else if (dac0_status & DA0_STATUS_DERR) { printf("DAC0 pipeline underflow\n"); exit(1); } /* write data to DAC0 FIFO if it isn't full */ if (!(dac0_status & DA0_STATUS_FF)) { rc = ioctl(fd, PCI550X_IOCS_DA0_FIFO, &u1[i].dac_fifo); if(rc == -1) { perror("ioctl PCI550X_IOCS_DA0_FIFO"); exit(1); } else { if (packed && bipolar && filled) printf("%s:%s DAC0 (P,B): 0x%04hx = " "%f Volts\n" "%s:%s DAC0 (P,B): 0x%04hx = " "%f Volts\n", device, brd_names[brd_type], u1[j].bp_dac_fifo[0], u1[j].bp_dac_fifo[0] * drt.bp_res, device, brd_names[brd_type], u1[j].bp_dac_fifo[1], u1[j].bp_dac_fifo[1] * drt.bp_res); else if (packed && (!bipolar) && filled) printf("%s:%s DAC0 (P,U): 0x%04hx = " "%f Volts\n" "%s:%s DAC0 (P,U): 0x%04hx = " "%f Volts\n", device, brd_names[brd_type], u1[j].up_dac_fifo[0], u1[j].up_dac_fifo[0] * drt.up_res, device, brd_names[brd_type], u1[j].up_dac_fifo[1], u1[j].up_dac_fifo[1] * drt.up_res); else if (bipolar && filled) printf("%s:%s DAC0 (U,B): 0x%04hx = " "%f Volts\n", device, brd_names[brd_type], u1[j].bp_dac_fifo[0], u1[j].bp_dac_fifo[0] * drt.bp_res); else if (filled) printf("%s:%s DAC0 (U,U): 0x%04hx = " "%f Volts\n", device, brd_names[brd_type], u1[j].up_dac_fifo[0], u1[j].up_dac_fifo[0] * drt.up_res); } /* DAC1 sync */ if (S) { rc = ioctl(fd, PCI550X_IOCS_DA1_FIFO, &u1[i].dac_fifo); if(rc == -1) { perror("ioctl PCI550X_IOCS_DA1_FIFO"); exit(1); } } /* wrap around */ dac_fifo = u1[i].dac_fifo; i = (i + 1) % PCI550X_DAC_FIFO; u1[i].dac_fifo = dac_fifo; if (filled) j = (j + 1) % PCI550X_DAC_FIFO; /* ramp the output values */ if (packed && bipolar) if (u1[i].bp_dac_fifo[1] >= (drt.bp_max)) { u1[i].bp_dac_fifo[0] = drt.bp_min; u1[i].bp_dac_fifo[1] = drt.bp_min + 1; } else { u1[i].bp_dac_fifo[0] += 2; u1[i].bp_dac_fifo[1] += 2; } else if (packed && (!bipolar)) if (u1[i].up_dac_fifo[1] >= (drt.up_max)) { u1[i].up_dac_fifo[0] = drt.up_min; u1[i].up_dac_fifo[1] = drt.up_min + 1; } else { u1[i].up_dac_fifo[0] += 2; u1[i].up_dac_fifo[1] += 2; } else if (bipolar) if (u1[i].bp_dac_fifo[0] >= (drt.bp_max)) { u1[i].bp_dac_fifo[0] = drt.bp_min; } else { u1[i].bp_dac_fifo[0]++; } else if (u1[i].up_dac_fifo[1] >= (drt.up_max)) { u1[i].up_dac_fifo[0] = drt.up_min; } else { u1[i].up_dac_fifo[0]++; } } else if (!(gate_enabled)) { /* DAC gate enable */ if (g | G | t | T) { rc = ioctl(fd, PCI550X_IOCT_DA0_TGEN, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_TGEN"); exit(1); } else { printf("DAC0 external gate enabled\n"); } } else { rc = ioctl(fd, PCI550X_IOCT_DA0_CGEN, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA0_CGEN"); exit(1); } else { printf("DAC0 software gate enabled\n"); } } /* DAC1 sync */ if (S) { rc = ioctl(fd, PCI550X_IOCT_DA1_CVEN, PCI550X_ENABLE); if(rc == -1) { perror("ioctl PCI550X_IOCT_DA1_CVEN"); exit(1); } else { printf("%s:%s DAC1 enabled to do conversions\n", device, brd_names[brd_type]); } } gate_enabled = PCI550X_TRUE; } else if (!(dac0_status & DA0_STATUS_GATE) && gate_enabled) printf("DAC0 clock source gated OFF\n"); /* end FIFO Full check */ if (dac0_status & DA0_STATUS_FF) filled = PCI550X_TRUE; } /* end while */ close(fd); return(0); }
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