ioat91sam7a3.ddf

将UCOSII移植到AT91SAM7a3上

; ----------------------------------------------------------------------------
;          ATMEL Microcontroller Software Support  -  ROUSSET  -
; ----------------------------------------------------------------------------
;  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
;  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
;  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
;  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
;  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
;  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
;  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
;  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; ----------------------------------------------------------------------------
; File Name           : AT91SAM7A3.ddf
; Object              : AT91SAM7A3 definitions
; Generated           : AT91 SW Application Group  03/21/2005 (10:39:20)
; 
; CVS Reference       : /AT91SAM7A3.pl/1.25/Mon Mar 14 12:46:23 2005//
; CVS Reference       : /SYS_SAM7A3.pl/1.7/Thu Feb  3 17:18:25 2005//
; CVS Reference       : /MC_SAM7A3.pl/1.1/Thu Feb  3 17:02:04 2005//
; CVS Reference       : /PMC_SAM7A3.pl/1.2/Tue Feb  8 13:58:44 2005//
; CVS Reference       : /RSTC_SAM7A3.pl/1.1/Thu Feb  3 16:56:45 2005//
; CVS Reference       : /SHDWC_SAM7A3.pl/1.1/Thu Feb  3 16:25:23 2005//
; CVS Reference       : /AIC_6075A.pl/1.1/Fri Jun 28 10:36:48 2002//
; CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
; CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
; CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
; CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
; CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
; CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
; CVS Reference       : /SPI_6088D.pl/1.2/Mon Feb 14 07:24:18 2005//
; CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
; CVS Reference       : /SSC_6078A.pl/1.1/Tue Jul 13 07:45:40 2004//
; CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
; CVS Reference       : /PWM_6044D.pl/1.1/Tue Apr 27 14:53:52 2004//
; CVS Reference       : /UDP_6083C.pl/1.1/Mon Jan 31 13:01:46 2005//
; CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
; CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
; CVS Reference       : /MCI_6101A.pl/1.1/Tue May 18 13:48:46 2004//
; CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
; CVS Reference       : /AES_6149A.pl/1.10/Mon Feb  7 09:44:25 2005//
; CVS Reference       : /DES3_6150A.pl/1.1/Mon Jan 17 08:34:31 2005//
; ----------------------------------------------------------------------------

[Sfr]

; ========== Register definition for SYS peripheral ========== 
sfr = "SYS_GPBR0", 	"Memory", 0xfffffd50, 4, base=16
sfr = "SYS_GPBR1", 	"Memory", 0xfffffd54, 4, base=16
; ========== Register definition for AIC peripheral ========== 
sfr = "AIC_SMR", 	"Memory", 0xfffff000, 4, base=16
sfr = "AIC_SMR.PRIOR", 	"Memory", 0xfffff000, 4, base=16, bitRange=0-2
sfr = "AIC_SMR.SRCTYPE", 	"Memory", 0xfffff000, 4, base=16, bitRange=5-6
sfr = "AIC_SVR", 	"Memory", 0xfffff080, 4, base=16
sfr = "AIC_IVR", 	"Memory", 0xfffff100, 4, base=16
sfr = "AIC_FVR", 	"Memory", 0xfffff104, 4, base=16
sfr = "AIC_ISR", 	"Memory", 0xfffff108, 4, base=16
sfr = "AIC_IPR", 	"Memory", 0xfffff10c, 4, base=16
sfr = "AIC_IMR", 	"Memory", 0xfffff110, 4, base=16
sfr = "AIC_CISR", 	"Memory", 0xfffff114, 4, base=16
sfr = "AIC_CISR.NFIQ", 	"Memory", 0xfffff114, 4, base=16, bitRange=0
sfr = "AIC_CISR.NIRQ", 	"Memory", 0xfffff114, 4, base=16, bitRange=1
sfr = "AIC_IECR", 	"Memory", 0xfffff120, 4, base=16
sfr = "AIC_IDCR", 	"Memory", 0xfffff124, 4, base=16
sfr = "AIC_ICCR", 	"Memory", 0xfffff128, 4, base=16
sfr = "AIC_ISCR", 	"Memory", 0xfffff12c, 4, base=16
sfr = "AIC_EOICR", 	"Memory", 0xfffff130, 4, base=16
sfr = "AIC_SPU", 	"Memory", 0xfffff134, 4, base=16
sfr = "AIC_DCR", 	"Memory", 0xfffff138, 4, base=16
sfr = "AIC_DCR.PROT", 	"Memory", 0xfffff138, 4, base=16, bitRange=0
sfr = "AIC_DCR.GMSK", 	"Memory", 0xfffff138, 4, base=16, bitRange=1
sfr = "AIC_FFER", 	"Memory", 0xfffff140, 4, base=16
sfr = "AIC_FFDR", 	"Memory", 0xfffff144, 4, base=16
sfr = "AIC_FFSR", 	"Memory", 0xfffff148, 4, base=16
; ========== Register definition for PDC_DBGU peripheral ========== 
sfr = "DBGU_RPR", 	"Memory", 0xfffff300, 4, base=16
sfr = "DBGU_RCR", 	"Memory", 0xfffff304, 4, base=16
sfr = "DBGU_TPR", 	"Memory", 0xfffff308, 4, base=16
sfr = "DBGU_TCR", 	"Memory", 0xfffff30c, 4, base=16
sfr = "DBGU_RNPR", 	"Memory", 0xfffff310, 4, base=16
sfr = "DBGU_RNCR", 	"Memory", 0xfffff314, 4, base=16
sfr = "DBGU_TNPR", 	"Memory", 0xfffff318, 4, base=16
sfr = "DBGU_TNCR", 	"Memory", 0xfffff31c, 4, base=16
sfr = "DBGU_PTCR", 	"Memory", 0xfffff320, 4, base=16
sfr = "DBGU_PTCR.RXTEN", 	"Memory", 0xfffff320, 4, base=16, bitRange=0
sfr = "DBGU_PTCR.RXTDIS", 	"Memory", 0xfffff320, 4, base=16, bitRange=1
sfr = "DBGU_PTCR.TXTEN", 	"Memory", 0xfffff320, 4, base=16, bitRange=8
sfr = "DBGU_PTCR.TXTDIS", 	"Memory", 0xfffff320, 4, base=16, bitRange=9
sfr = "DBGU_PTSR", 	"Memory", 0xfffff324, 4, base=16
sfr = "DBGU_PTSR.RXTEN", 	"Memory", 0xfffff324, 4, base=16, bitRange=0
sfr = "DBGU_PTSR.TXTEN", 	"Memory", 0xfffff324, 4, base=16, bitRange=8
; ========== Register definition for DBGU peripheral ========== 
sfr = "DBGU_CR", 	"Memory", 0xfffff200, 4, base=16
sfr = "DBGU_CR.RSTRX", 	"Memory", 0xfffff200, 4, base=16, bitRange=2
sfr = "DBGU_CR.RSTTX", 	"Memory", 0xfffff200, 4, base=16, bitRange=3
sfr = "DBGU_CR.RXEN", 	"Memory", 0xfffff200, 4, base=16, bitRange=4
sfr = "DBGU_CR.RXDIS", 	"Memory", 0xfffff200, 4, base=16, bitRange=5
sfr = "DBGU_CR.TXEN", 	"Memory", 0xfffff200, 4, base=16, bitRange=6
sfr = "DBGU_CR.TXDIS", 	"Memory", 0xfffff200, 4, base=16, bitRange=7
sfr = "DBGU_CR.RSTSTA", 	"Memory", 0xfffff200, 4, base=16, bitRange=8
sfr = "DBGU_MR", 	"Memory", 0xfffff204, 4, base=16
sfr = "DBGU_MR.PAR", 	"Memory", 0xfffff204, 4, base=16, bitRange=9-11
sfr = "DBGU_MR.CHMODE", 	"Memory", 0xfffff204, 4, base=16, bitRange=14-15
sfr = "DBGU_IER", 	"Memory", 0xfffff208, 4, base=16
sfr = "DBGU_IER.RXRDY", 	"Memory", 0xfffff208, 4, base=16, bitRange=0
sfr = "DBGU_IER.TXRDY", 	"Memory", 0xfffff208, 4, base=16, bitRange=1
sfr = "DBGU_IER.ENDRX", 	"Memory", 0xfffff208, 4, base=16, bitRange=3
sfr = "DBGU_IER.ENDTX", 	"Memory", 0xfffff208, 4, base=16, bitRange=4
sfr = "DBGU_IER.OVRE", 	"Memory", 0xfffff208, 4, base=16, bitRange=5
sfr = "DBGU_IER.FRAME", 	"Memory", 0xfffff208, 4, base=16, bitRange=6
sfr = "DBGU_IER.PARE", 	"Memory", 0xfffff208, 4, base=16, bitRange=7
sfr = "DBGU_IER.TXEMPTY", 	"Memory", 0xfffff208, 4, base=16, bitRange=9
sfr = "DBGU_IER.TXBUFE", 	"Memory", 0xfffff208, 4, base=16, bitRange=11
sfr = "DBGU_IER.RXBUFF", 	"Memory", 0xfffff208, 4, base=16, bitRange=12
sfr = "DBGU_IER.TX", 	"Memory", 0xfffff208, 4, base=16, bitRange=30
sfr = "DBGU_IER.RX", 	"Memory", 0xfffff208, 4, base=16, bitRange=31
sfr = "DBGU_IDR", 	"Memory", 0xfffff20c, 4, base=16
sfr = "DBGU_IDR.RXRDY", 	"Memory", 0xfffff20c, 4, base=16, bitRange=0
sfr = "DBGU_IDR.TXRDY", 	"Memory", 0xfffff20c, 4, base=16, bitRange=1
sfr = "DBGU_IDR.ENDRX", 	"Memory", 0xfffff20c, 4, base=16, bitRange=3
sfr = "DBGU_IDR.ENDTX", 	"Memory", 0xfffff20c, 4, base=16, bitRange=4
sfr = "DBGU_IDR.OVRE", 	"Memory", 0xfffff20c, 4, base=16, bitRange=5
sfr = "DBGU_IDR.FRAME", 	"Memory", 0xfffff20c, 4, base=16, bitRange=6
sfr = "DBGU_IDR.PARE", 	"Memory", 0xfffff20c, 4, base=16, bitRange=7
sfr = "DBGU_IDR.TXEMPTY", 	"Memory", 0xfffff20c, 4, base=16, bitRange=9
sfr = "DBGU_IDR.TXBUFE", 	"Memory", 0xfffff20c, 4, base=16, bitRange=11
sfr = "DBGU_IDR.RXBUFF", 	"Memory", 0xfffff20c, 4, base=16, bitRange=12
sfr = "DBGU_IDR.TX", 	"Memory", 0xfffff20c, 4, base=16, bitRange=30
sfr = "DBGU_IDR.RX", 	"Memory", 0xfffff20c, 4, base=16, bitRange=31
sfr = "DBGU_IMR", 	"Memory", 0xfffff210, 4, base=16
sfr = "DBGU_IMR.RXRDY", 	"Memory", 0xfffff210, 4, base=16, bitRange=0
sfr = "DBGU_IMR.TXRDY", 	"Memory", 0xfffff210, 4, base=16, bitRange=1
sfr = "DBGU_IMR.ENDRX", 	"Memory", 0xfffff210, 4, base=16, bitRange=3
sfr = "DBGU_IMR.ENDTX", 	"Memory", 0xfffff210, 4, base=16, bitRange=4
sfr = "DBGU_IMR.OVRE", 	"Memory", 0xfffff210, 4, base=16, bitRange=5
sfr = "DBGU_IMR.FRAME", 	"Memory", 0xfffff210, 4, base=16, bitRange=6
sfr = "DBGU_IMR.PARE", 	"Memory", 0xfffff210, 4, base=16, bitRange=7
sfr = "DBGU_IMR.TXEMPTY", 	"Memory", 0xfffff210, 4, base=16, bitRange=9
sfr = "DBGU_IMR.TXBUFE", 	"Memory", 0xfffff210, 4, base=16, bitRange=11
sfr = "DBGU_IMR.RXBUFF", 	"Memory", 0xfffff210, 4, base=16, bitRange=12
sfr = "DBGU_IMR.TX", 	"Memory", 0xfffff210, 4, base=16, bitRange=30
sfr = "DBGU_IMR.RX", 	"Memory", 0xfffff210, 4, base=16, bitRange=31
sfr = "DBGU_CSR", 	"Memory", 0xfffff214, 4, base=16
sfr = "DBGU_CSR.RXRDY", 	"Memory", 0xfffff214, 4, base=16, bitRange=0
sfr = "DBGU_CSR.TXRDY", 	"Memory", 0xfffff214, 4, base=16, bitRange=1
sfr = "DBGU_CSR.ENDRX", 	"Memory", 0xfffff214, 4, base=16, bitRange=3
sfr = "DBGU_CSR.ENDTX", 	"Memory", 0xfffff214, 4, base=16, bitRange=4
sfr = "DBGU_CSR.OVRE", 	"Memory", 0xfffff214, 4, base=16, bitRange=5
sfr = "DBGU_CSR.FRAME", 	"Memory", 0xfffff214, 4, base=16, bitRange=6
sfr = "DBGU_CSR.PARE", 	"Memory", 0xfffff214, 4, base=16, bitRange=7
sfr = "DBGU_CSR.TXEMPTY", 	"Memory", 0xfffff214, 4, base=16, bitRange=9
sfr = "DBGU_CSR.TXBUFE", 	"Memory", 0xfffff214, 4, base=16, bitRange=11
sfr = "DBGU_CSR.RXBUFF", 	"Memory", 0xfffff214, 4, base=16, bitRange=12
sfr = "DBGU_CSR.TX", 	"Memory", 0xfffff214, 4, base=16, bitRange=30
sfr = "DBGU_CSR.RX", 	"Memory", 0xfffff214, 4, base=16, bitRange=31
sfr = "DBGU_RHR", 	"Memory", 0xfffff218, 4, base=16
sfr = "DBGU_THR", 	"Memory", 0xfffff21c, 4, base=16
sfr = "DBGU_BRGR", 	"Memory", 0xfffff220, 4, base=16
sfr = "DBGU_CIDR", 	"Memory", 0xfffff240, 4, base=16
sfr = "DBGU_EXID", 	"Memory", 0xfffff244, 4, base=16
sfr = "DBGU_FNTR", 	"Memory", 0xfffff248, 4, base=16
sfr = "DBGU_FNTR.NTRST", 	"Memory", 0xfffff248, 4, base=16, bitRange=0
; ========== Register definition for PIOA peripheral ========== 
sfr = "PIOA_PER", 	"Memory", 0xfffff400, 4, base=16
sfr = "PIOA_PDR", 	"Memory", 0xfffff404, 4, base=16
sfr = "PIOA_PSR", 	"Memory", 0xfffff408, 4, base=16
sfr = "PIOA_OER", 	"Memory", 0xfffff410, 4, base=16
sfr = "PIOA_ODR", 	"Memory", 0xfffff414, 4, base=16
sfr = "PIOA_OSR", 	"Memory", 0xfffff418, 4, base=16
sfr = "PIOA_IFER", 	"Memory", 0xfffff420, 4, base=16
sfr = "PIOA_IFDR", 	"Memory", 0xfffff424, 4, base=16
sfr = "PIOA_IFSR", 	"Memory", 0xfffff428, 4, base=16
sfr = "PIOA_SODR", 	"Memory", 0xfffff430, 4, base=16
sfr = "PIOA_CODR", 	"Memory", 0xfffff434, 4, base=16
sfr = "PIOA_ODSR", 	"Memory", 0xfffff438, 4, base=16
sfr = "PIOA_PDSR", 	"Memory", 0xfffff43c, 4, base=16
sfr = "PIOA_IER", 	"Memory", 0xfffff440, 4, base=16
sfr = "PIOA_IDR", 	"Memory", 0xfffff444, 4, base=16
sfr = "PIOA_IMR", 	"Memory", 0xfffff448, 4, base=16
sfr = "PIOA_ISR", 	"Memory", 0xfffff44c, 4, base=16
sfr = "PIOA_MDER", 	"Memory", 0xfffff450, 4, base=16
sfr = "PIOA_MDDR", 	"Memory", 0xfffff454, 4, base=16
sfr = "PIOA_MDSR", 	"Memory", 0xfffff458, 4, base=16
sfr = "PIOA_PPUDR", 	"Memory", 0xfffff460, 4, base=16
sfr = "PIOA_PPUER", 	"Memory", 0xfffff464, 4, base=16
sfr = "PIOA_PPUSR", 	"Memory", 0xfffff468, 4, base=16
sfr = "PIOA_ASR", 	"Memory", 0xfffff470, 4, base=16
sfr = "PIOA_BSR", 	"Memory", 0xfffff474, 4, base=16
sfr = "PIOA_ABSR", 	"Memory", 0xfffff478, 4, base=16
sfr = "PIOA_OWER", 	"Memory", 0xfffff4a0, 4, base=16
sfr = "PIOA_OWDR", 	"Memory", 0xfffff4a4, 4, base=16