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<font color=#B22222>// -------- <a href="AT91SAM7A3_DBGU.html#DBGU_CSR">DBGU_CSR</a> : (<a href="AT91SAM7A3_DBGU.html#DBGU">DBGU</a> Offset: 0x14) Debug Unit Channel Status Register -------- </font>
<font color=#B22222>// -------- <a href="AT91SAM7A3_DBGU.html#DBGU_FNTR">DBGU_FNTR</a> : (<a href="AT91SAM7A3_DBGU.html#DBGU">DBGU</a> Offset: 0x48) Debug Unit FORCE_NTRST Register -------- </font>
<font color=#008200>#define</font> <b><a name="AT91C_US_FORCE_NTRST">AT91C_US_FORCE_NTRST</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 0) <font color=#B22222>// (<a href="AT91SAM7A3_DBGU.html#DBGU">DBGU</a>) Force NTRST in JTAG</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#B22222>// SOFTWARE API DEFINITION FOR Parallel Input Output Controler</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#0000FF>typedef</font> <font color=#0000FF>struct</font> <b><a name="_AT91S_PIO">_AT91S_PIO</a></b> {
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_PER">PIO_PER</a>; <font color=#B22222>// <a href="AT91SAM7A3_PIO.html#PIO">PIO</a> Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_PDR">PIO_PDR</a>; <font color=#B22222>// <a href="AT91SAM7A3_PIO.html#PIO">PIO</a> Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_PSR">PIO_PSR</a>; <font color=#B22222>// <a href="AT91SAM7A3_PIO.html#PIO">PIO</a> Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved0[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_OER">PIO_OER</a>; <font color=#B22222>// Output Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_ODR">PIO_ODR</a>; <font color=#B22222>// Output Disable Registerr</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_OSR">PIO_OSR</a>; <font color=#B22222>// Output Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved1[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_IFER">PIO_IFER</a>; <font color=#B22222>// Input Filter Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_IFDR">PIO_IFDR</a>; <font color=#B22222>// Input Filter Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_IFSR">PIO_IFSR</a>; <font color=#B22222>// Input Filter Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved2[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_SODR">PIO_SODR</a>; <font color=#B22222>// Set Output Data Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_CODR">PIO_CODR</a>; <font color=#B22222>// Clear Output Data Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_ODSR">PIO_ODSR</a>; <font color=#B22222>// Output Data Status Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_PDSR">PIO_PDSR</a>; <font color=#B22222>// Pin Data Status Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_IER">PIO_IER</a>; <font color=#B22222>// Interrupt Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_IDR">PIO_IDR</a>; <font color=#B22222>// Interrupt Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_IMR">PIO_IMR</a>; <font color=#B22222>// Interrupt Mask Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_ISR">PIO_ISR</a>; <font color=#B22222>// Interrupt Status Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_MDER">PIO_MDER</a>; <font color=#B22222>// Multi-driver Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_MDDR">PIO_MDDR</a>; <font color=#B22222>// Multi-driver Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_MDSR">PIO_MDSR</a>; <font color=#B22222>// Multi-driver Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved3[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_PPUDR">PIO_PPUDR</a>; <font color=#B22222>// Pull-up Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_PPUER">PIO_PPUER</a>; <font color=#B22222>// Pull-up Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_PPUSR">PIO_PPUSR</a>; <font color=#B22222>// Pull-up Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved4[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_ASR">PIO_ASR</a>; <font color=#B22222>// Select A Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_BSR">PIO_BSR</a>; <font color=#B22222>// Select B Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_ABSR">PIO_ABSR</a>; <font color=#B22222>// AB Select Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved5[9]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_OWER">PIO_OWER</a>; <font color=#B22222>// Output Write Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_OWDR">PIO_OWDR</a>; <font color=#B22222>// Output Write Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PIO.html#PIO_OWSR">PIO_OWSR</a>; <font color=#B22222>// Output Write Status Register</font>
} <b><a name="AT91S_PIO">AT91S_PIO</a></b>, *<b><a name="AT91PS_PIO">AT91PS_PIO</a></b>;
<font color=#B22222>// *****************************************************************************</font>
<font color=#B22222>// SOFTWARE API DEFINITION FOR Clock Generator Controler</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#0000FF>typedef</font> <font color=#0000FF>struct</font> <b><a name="_AT91S_CKGR">_AT91S_CKGR</a></b> {
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_CKGR.html#CKGR_MOR">CKGR_MOR</a>; <font color=#B22222>// Main Oscillator Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_CKGR.html#CKGR_MCFR">CKGR_MCFR</a>; <font color=#B22222>// Main Clock Frequency Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved0[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_CKGR.html#CKGR_PLLR">CKGR_PLLR</a>; <font color=#B22222>// PLL Register</font>
} <b><a name="AT91S_CKGR">AT91S_CKGR</a></b>, *<b><a name="AT91PS_CKGR">AT91PS_CKGR</a></b>;
<font color=#B22222>// -------- <a href="AT91SAM7A3_CKGR.html#CKGR_MOR">CKGR_MOR</a> : (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a> Offset: 0x0) Main Oscillator Register -------- </font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_MOSCEN">AT91C_CKGR_MOSCEN</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 0) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Main Oscillator Enable</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_OSCBYPASS">AT91C_CKGR_OSCBYPASS</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 1) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Main Oscillator Bypass</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_OSCOUNT">AT91C_CKGR_OSCOUNT</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0xFF << 8) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Main Oscillator Start-up Time</font>
<font color=#B22222>// -------- <a href="AT91SAM7A3_CKGR.html#CKGR_MCFR">CKGR_MCFR</a> : (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a> Offset: 0x4) Main Clock Frequency Register -------- </font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_MAINF">AT91C_CKGR_MAINF</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0xFFFF << 0) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Main Clock Frequency</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_MAINRDY">AT91C_CKGR_MAINRDY</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 16) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Main Clock Ready</font>
<font color=#B22222>// -------- <a href="AT91SAM7A3_CKGR.html#CKGR_PLLR">CKGR_PLLR</a> : (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a> Offset: 0xc) PLL B Register -------- </font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_DIV">AT91C_CKGR_DIV</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0xFF << 0) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Divider Selected</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_DIV_0">AT91C_CKGR_DIV_0</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x0) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Divider output is 0</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_DIV_BYPASS">AT91C_CKGR_DIV_BYPASS</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Divider is bypassed</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_PLLCOUNT">AT91C_CKGR_PLLCOUNT</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x3F << 8) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) PLL Counter</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_OUT">AT91C_CKGR_OUT</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x3 << 14) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) PLL Output Frequency Range</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_OUT_0">AT91C_CKGR_OUT_0</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x0 << 14) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Please refer to the PLL datasheet</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_OUT_1">AT91C_CKGR_OUT_1</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 14) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Please refer to the PLL datasheet</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_OUT_2">AT91C_CKGR_OUT_2</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x2 << 14) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Please refer to the PLL datasheet</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_OUT_3">AT91C_CKGR_OUT_3</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x3 << 14) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Please refer to the PLL datasheet</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_MUL">AT91C_CKGR_MUL</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x7FF << 16) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) PLL Multiplier</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_USBDIV">AT91C_CKGR_USBDIV</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x3 << 28) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Divider <font color=#0000FF>for</font> USB Clocks</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_USBDIV_0">AT91C_CKGR_USBDIV_0</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x0 << 28) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Divider output is PLL clock output</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_USBDIV_1">AT91C_CKGR_USBDIV_1</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 28) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Divider output is PLL clock output divided by 2</font>
<font color=#008200>#define</font> <b><a name="AT91C_CKGR_USBDIV_2">AT91C_CKGR_USBDIV_2</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x2 << 28) <font color=#B22222>// (<a href="AT91SAM7A3_CKGR.html#CKGR">CKGR</a>) Divider output is PLL clock output divided by 4</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#B22222>// SOFTWARE API DEFINITION FOR Power Management Controler</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#0000FF>typedef</font> <font color=#0000FF>struct</font> <b><a name="_AT91S_PMC">_AT91S_PMC</a></b> {
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PMC.html#PMC_SCER">PMC_SCER</a>; <font color=#B22222>// System Clock Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PMC.html#PMC_SCDR">PMC_SCDR</a>; <font color=#B22222>// System Clock Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PMC.html#PMC_SCSR">PMC_SCSR</a>; <font color=#B22222>// System Clock Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved0[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PMC.html#PMC_PCER">PMC_PCER</a>; <font color=#B22222>// Peripheral Clock Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7A3_PMC.html#PMC_PCDR">PMC_PCDR</a>; <font color=#B22222>// Peripheral Clock Disable R⌨️ 快捷键说明
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