mcp41010.lst

ATmega16-ad1602

Interrupt Vectors
    00000 940C 002E JMP	__text_start|__start

Program Code (text area)
__text_start|__start:
    0002E E5CF      LDI	R28,0x5F
    0002F E0D4      LDI	R29,4
    00030 BFCD      OUT	0x3D,R28
    00031 BFDE      OUT	0x3E,R29
    00032 51C0      SUBI	R28,0x10
    00033 40D0      SBCI	R29,0
    00034 EA0A      LDI	R16,0xAA
    00035 8308      ST	Y,R16
    00036 2400      CLR	R0
    00037 E6E0      LDI	R30,0x60
    00038 E0F0      LDI	R31,0
    00039 E010      LDI	R17,0
    0003A 36E0      CPI	R30,0x60
    0003B 07F1      CPC	R31,R17
    0003C F011      BEQ	0x003F
    0003D 9201      ST	Z+,R0
    0003E CFFB      RJMP	0x003A
    0003F 8300      ST	Z,R16
    00040 E5EC      LDI	R30,0x5C
    00041 E0F0      LDI	R31,0
    00042 E6A0      LDI	R26,0x60
    00043 E0B0      LDI	R27,0
    00044 E010      LDI	R17,0
    00045 E000      LDI	R16,0
    00046 BF0B      OUT	0x3B,R16
    00047 35EC      CPI	R30,0x5C
    00048 07F1      CPC	R31,R17
    00049 F021      BEQ	0x004E
    0004A 95C8      LPM
    0004B 9631      ADIW	R30,1
    0004C 920D      ST	X+,R0
    0004D CFF9      RJMP	0x0047
    0004E 940E 00C3 CALL	_main
_exit:
    00050 CFFF      RJMP	_exit
FILE: F:\file\数控电源3\ad_da\text\mcp41010.c
(0001) #include<iom16v.h>
(0002) 
(0003) #define r_full		9340
(0004) 
(0005) #define cs_ddr		DDRA
(0006) #define cs_port		PORTA
(0007) #define sck_ddr		DDRA
(0008) #define sck_port	PORTA
(0009) #define si_ddr		DDRA
(0010) #define si_port		PORTA
(0011) #define cs			0x01
(0012) #define sck			0x02
(0013) #define si			0x04
(0014) 
(0015) void r_io_init(void)
(0016) {
(0017) 	cs_ddr|=cs;
_r_io_init:
    00051 9AD0      SBI	0x1A,0
(0018) 	sck_ddr|=sck;
    00052 9AD1      SBI	0x1A,1
(0019) 	si_ddr|=si;
    00053 9AD2      SBI	0x1A,2
(0020) 	cs_port|=cs;
    00054 9AD8      SBI	0x1B,0
(0021) 	sck_port&=~sck;
    00055 98D9      CBI	0x1B,1
(0022) 	si_port&=~si;
    00056 98DA      CBI	0x1B,2
    00057 9508      RET
_write_r:
  count                --> R20
  dat                  --> R18
  cmd                  --> R16
    00058 934A      ST	-Y,R20
(0023) }
(0024) 
(0025) void write_r(unsigned char cmd,unsigned char dat)			//cmd=0x11:write data;	cmd=0x31:cut off
(0026) {
(0027) 	unsigned char count=0;
    00059 2744      CLR	R20
(0028) 	sck_port&=~sck;//sck=0
    0005A 98D9      CBI	0x1B,1
(0029) 	si_port&=~si;//si=0
    0005B 98DA      CBI	0x1B,2
(0030) 	cs_port&=~cs;//cs=0
    0005C 98D8      CBI	0x1B,0
(0031) 	sck_port|=sck;				//0
    0005D 9AD9      SBI	0x1B,1
(0032) 	sck_port&=~sck;
    0005E 98D9      CBI	0x1B,1
(0033) 	sck_port|=sck;				//1
    0005F 9AD9      SBI	0x1B,1
(0034) 	sck_port&=~sck;
    00060 98D9      CBI	0x1B,1
(0035) 	if(cmd&0x20)
    00061 FF05      SBRS	R16,5
    00062 C002      RJMP	0x0065
(0036) 		si_port|=si;
    00063 9ADA      SBI	0x1B,2
    00064 C001      RJMP	0x0066
(0037) 	else
(0038) 		si_port&=~si;
    00065 98DA      CBI	0x1B,2
(0039) 	sck_port|=sck;				//2
    00066 9AD9      SBI	0x1B,1
(0040) 	sck_port&=~sck;
    00067 98D9      CBI	0x1B,1
(0041) 	if(cmd&0x10)
    00068 FF04      SBRS	R16,4
    00069 C002      RJMP	0x006C
(0042) 		si_port|=si;
    0006A 9ADA      SBI	0x1B,2
    0006B C001      RJMP	0x006D
(0043) 	else
(0044) 		si_port&=~si;
    0006C 98DA      CBI	0x1B,2
(0045) 	sck_port|=sck;				//3
    0006D 9AD9      SBI	0x1B,1
(0046) 	sck_port&=~sck;
    0006E 98D9      CBI	0x1B,1
(0047) 	si_port&=~si;
    0006F 98DA      CBI	0x1B,2
(0048) 	sck_port|=sck;				//4
    00070 9AD9      SBI	0x1B,1
(0049) 	sck_port&=~sck;
    00071 98D9      CBI	0x1B,1
(0050) 	sck_port|=sck;				//5
    00072 9AD9      SBI	0x1B,1
(0051) 	sck_port&=~sck;
    00073 98D9      CBI	0x1B,1
(0052) 	if(cmd&0x02)
    00074 FF01      SBRS	R16,1
    00075 C002      RJMP	0x0078
(0053) 		si_port|=si;
    00076 9ADA      SBI	0x1B,2
    00077 C001      RJMP	0x0079
(0054) 	else
(0055) 		si_port&=~si;
    00078 98DA      CBI	0x1B,2
(0056) 	sck_port|=sck;				//6
    00079 9AD9      SBI	0x1B,1
(0057) 	sck_port&=~sck;
    0007A 98D9      CBI	0x1B,1
(0058) 	if(cmd&0x01)
    0007B FF00      SBRS	R16,0
    0007C C002      RJMP	0x007F
(0059) 		si_port|=si;
    0007D 9ADA      SBI	0x1B,2
    0007E C001      RJMP	0x0080
(0060) 	else
(0061) 		si_port&=~si;
    0007F 98DA      CBI	0x1B,2
(0062) 	sck_port|=sck;				//7
    00080 9AD9      SBI	0x1B,1
(0063) 	sck_port&=~sck;
    00081 98D9      CBI	0x1B,1
(0064) 	for(count=0;count<8;count++)
    00082 2744      CLR	R20
    00083 C009      RJMP	0x008D
(0065) 	{
(0066) 		if(dat&0x80)
    00084 FF27      SBRS	R18,7
    00085 C002      RJMP	0x0088
(0067) 			si_port|=si;
    00086 9ADA      SBI	0x1B,2
    00087 C001      RJMP	0x0089
(0068) 		else
(0069) 			si_port&=~si;
    00088 98DA      CBI	0x1B,2
(0070) 		sck_port|=sck;
    00089 9AD9      SBI	0x1B,1
(0071) 		sck_port&=~sck;
    0008A 98D9      CBI	0x1B,1
(0072) 		dat=dat<<1;
    0008B 0F22      LSL	R18
    0008C 9543      INC	R20
    0008D 3048      CPI	R20,0x8
    0008E F3A8      BCS	0x0084
(0073) 	}
(0074) 	cs_port|=cs;
    0008F 9AD8      SBI	0x1B,0
    00090 9149      LD	R20,Y+
    00091 9508      RET
(0075) }
(0076) 
(0077) void r_init(void)
(0078) {
(0079) 	r_io_init();
_r_init:
    00092 DFBE      RCALL	_r_io_init
(0080) 	write_r(0x11,0x7f);
    00093 E72F      LDI	R18,0x7F
    00094 E101      LDI	R16,0x11
    00095 CFC2      RJMP	_write_r
_set_r:
  buf1                 --> R10
  buf0                 --> Y,+0
  r                    --> R12
    00096 940E 00D5 CALL	push_xgset003C
    00098 0168      MOVW	R12,R16
    00099 9724      SBIW	R28,4
(0081) }
(0082) 
(0083) void set_r(unsigned int r)
(0084) {	
(0085) 	float buf0=0;
    0009A E508      LDI	R16,0x58
    0009B E010      LDI	R17,0
    0009C 940E 00E3 CALL	lpm32
    0009E 8308      ST	Y,R16
    0009F 8319      STD	Y+1,R17
    000A0 832A      STD	Y+2,R18
    000A1 833B      STD	Y+3,R19
(0086) 	unsigned char buf1=0;
(0087) 	buf0=r_full/255;
    000A2 E504      LDI	R16,0x54
    000A3 E010      LDI	R17,0
    000A4 940E 00E3 CALL	lpm32
    000A6 8308      ST	Y,R16
    000A7 8319      STD	Y+1,R17
    000A8 832A      STD	Y+2,R18
    000A9 833B      STD	Y+3,R19
(0088) 	buf0=r/buf0;
    000AA 0186      MOVW	R16,R12
    000AB 940E 0129 CALL	uint2fp
    000AD 01CE      MOVW	R24,R28
    000AE 939A      ST	-Y,R25
    000AF 938A      ST	-Y,R24
    000B0 940E 014D CALL	fpdiv1
    000B2 8308      ST	Y,R16
    000B3 8319      STD	Y+1,R17
    000B4 832A      STD	Y+2,R18
    000B5 833B      STD	Y+3,R19
(0089) 	buf1=(unsigned char)buf0;
    000B6 8108      LD	R16,Y
    000B7 8119      LDD	R17,Y+1
    000B8 812A      LDD	R18,Y+2
    000B9 813B      LDD	R19,Y+3
    000BA 940E 00F7 CALL	fpint
    000BC 2EA0      MOV	R10,R16
(0090) 	write_r(0x11,buf1);
    000BD 2D2A      MOV	R18,R10
    000BE E101      LDI	R16,0x11
    000BF DF98      RCALL	_write_r
    000C0 9624      ADIW	R28,4
    000C1 940C 00CA JMP	pop_xgset003C
(0091) }
(0092) 
(0093) 
(0094) 
(0095) 
(0096) 
(0097) 
(0098) 
(0099) 
(0100) 
(0101) 
(0102) 
(0103) //main.c
(0104) 
(0105) 
(0106) void main(void)
(0107) {
(0108) 	r_init();
_main:
    000C3 DFCE      RCALL	_r_init
    000C4 C003      RJMP	0x00C8
(0109) 	while(1)
(0110) 	{
(0111) 		set_r(5900);
FILE: <library>
    000C5 E00C      LDI	R16,0xC
    000C6 E117      LDI	R17,0x17
    000C7 DFCE      RCALL	_set_r
    000C8 CFFC      RJMP	0x00C5
    000C9 9508      RET
pop_xgset003C:
    000CA 90A9      LD	R10,Y+
    000CB 90B9      LD	R11,Y+
    000CC 90C9      LD	R12,Y+
    000CD 90D9      LD	R13,Y+
    000CE 9508      RET
push_xgsetF0FC:
    000CF 937A      ST	-Y,R23
    000D0 936A      ST	-Y,R22
push_xgset30FC:
    000D1 935A      ST	-Y,R21
    000D2 934A      ST	-Y,R20
push_xgset00FC:
    000D3 92FA      ST	-Y,R15
    000D4 92EA      ST	-Y,R14
push_xgset003C:
    000D5 92DA      ST	-Y,R13
    000D6 92CA      ST	-Y,R12
    000D7 92BA      ST	-Y,R11
    000D8 92AA      ST	-Y,R10
    000D9 9508      RET
neg32:
    000DA 9500      COM	R16
    000DB 9510      COM	R17
    000DC 9520      COM	R18
    000DD 9530      COM	R19
    000DE 5F0F      SUBI	R16,0xFF
    000DF 4F1F      SBCI	R17,0xFF
    000E0 4F2F      SBCI	R18,0xFF
    000E1 4F3F      SBCI	R19,0xFF
    000E2 9508      RET
lpm32:
    000E3 93EA      ST	-Y,R30
    000E4 93FA      ST	-Y,R31
    000E5 920A      ST	-Y,R0
    000E6 2FE0      MOV	R30,R16
    000E7 2FF1      MOV	R31,R17
    000E8 95C8      LPM
    000E9 2D00      MOV	R16,R0
    000EA 9631      ADIW	R30,1
    000EB 95C8      LPM
    000EC 2D10      MOV	R17,R0
    000ED 9631      ADIW	R30,1
    000EE 95C8      LPM
    000EF 2D20      MOV	R18,R0
    000F0 9631      ADIW	R30,1
    000F1 95C8      LPM
    000F2 2D30      MOV	R19,R0
    000F3 9009      LD	R0,Y+
    000F4 91F9      LD	R31,Y+
    000F5 91E9      LD	R30,Y+
    000F6 9508      RET
fpint:
    000F7 924A      ST	-Y,R4
    000F8 925A      ST	-Y,R5
    000F9 926A      ST	-Y,R6
    000FA 938A      ST	-Y,R24
    000FB 940E 01F7 CALL	unpacku
    000FD F111      BEQ	0x0120
    000FE 2055      TST	R5
    000FF F0E2      BMI	0x011C
    00100 E18F      LDI	R24,0x1F
    00101 1648      CP	R4,R24
    00102 F4C0      BCC	0x011B
    00103 E187      LDI	R24,0x17
    00104 1648      CP	R4,R24
    00105 F0D1      BEQ	0x0120
    00106 F458      BCC	0x0112
    00107 9441      NEG	R4
    00108 EE89      LDI	R24,0xE9
    00109 1A48      SUB	R4,R24
    0010A C005      RJMP	0x0110
    0010B 9535      ASR	R19
    0010C 9527      ROR	R18
    0010D 9517      ROR	R17
    0010E 9507      ROR	R16
    0010F 944A      DEC	R4
    00110 F7D1      BNE	0x010B
    00111 C00E      RJMP	0x0120
    00112 E187      LDI	R24,0x17