at91sam9260_pmc.html

ATMEL AT91SAM9260的中段控制程序！

<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_GetStatus">AT91F_PMC_GetStatus</a></b></font></td><td><font size="-1">Return PMC Interrupt Status</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_CfgMainOscillatorReg">AT91F_CKGR_CfgMainOscillatorReg</a></b></font></td><td><font size="-1">Cfg the main oscillator</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_GetPLLAReg">AT91F_CKGR_GetPLLAReg</a></b></font></td><td><font size="-1">Get the PLLA Register</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_GetPLLBReg">AT91F_CKGR_GetPLLBReg</a></b></font></td><td><font size="-1">Get the PLLB Register</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_GetProcessorClock">AT91F_PMC_GetProcessorClock</a></b></font></td><td><font size="-1">Return processor clock in Hz</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_DisablePLLBOutput">AT91F_CKGR_DisablePLLBOutput</a></b></font></td><td><font size="-1">Disable the PLLB output</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_DisablePLLAInput">AT91F_CKGR_DisablePLLAInput</a></b></font></td><td><font size="-1">Disable the PLLA Input</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_CfgSysClkEnableReg">AT91F_PMC_CfgSysClkEnableReg</a></b></font></td><td><font size="-1">Configure the System Clock Enable Register of the PMC controller</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_EnablePeriphClock">AT91F_PMC_EnablePeriphClock</a></b></font></td><td><font size="-1">Enable peripheral clock</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_DisablePeriphClock">AT91F_PMC_DisablePeriphClock</a></b></font></td><td><font size="-1">Disable peripheral clock</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_DisablePCK">AT91F_PMC_DisablePCK</a></b></font></td><td><font size="-1">Disable Programmable Clock x Output</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_GetSysClkStatusReg">AT91F_PMC_GetSysClkStatusReg</a></b></font></td><td><font size="-1">Return the System Clock Status Register of the PMC controller</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_IsStatusSet">AT91F_PMC_IsStatusSet</a></b></font></td><td><font size="-1">Test if PMC Status is Set</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_DisableIt">AT91F_PMC_DisableIt</a></b></font></td><td><font size="-1">Disable PMC interrupt</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_CfgMainOscStartUpTime">AT91F_CKGR_CfgMainOscStartUpTime</a></b></font></td><td><font size="-1">Cfg MOR Register according to the main osc startup time</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_EnableHCK">AT91F_PMC_EnableHCK</a></b></font></td><td><font size="-1">Enable AHB peripheral clock</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_DisablePLLAOutput">AT91F_CKGR_DisablePLLAOutput</a></b></font></td><td><font size="-1">Disable the PLLA output</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_DisablePLLA">AT91F_CKGR_DisablePLLA</a></b></font></td><td><font size="-1">Disable the PLLA input and output for conso reduction</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_PMC_CfgMCKReg">AT91F_PMC_CfgMCKReg</a></b></font></td><td><font size="-1">Cfg Master Clock Register</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_CKGR_DisablePLLB">AT91F_CKGR_DisablePLLB</a></b></font></td><td><font size="-1">Disable the PLLB input and output for conso reduction</font></td></tr>
</null></table></null><h2>PMC Register Description</h2>
<null><a name="PMC_SCER"></a><h4><a href="#PMC">PMC</a>: <i><a href="AT91SAM9260_h.html#AT91_REG">AT91_REG</a></i> PMC_SCER  <i>System Clock Enable Register</i></h4><ul><null><font size="-2"><li><b>PMC</b> <i><a href="AT91SAM9260_h.html#AT91C_PMC_SCER">AT91C_PMC_SCER</a></i> 0xFFFFFC00</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="PMC_PCK"></a><b>PMC_PCK</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK">AT91C_PMC_PCK</a></font></td><td><b>Processor Clock</b><br>0 = The processor clock is disabled<br>1 = The processor clock is enabled</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="PMC_UHP"></a><b>PMC_UHP</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_UHP">AT91C_PMC_UHP</a></font></td><td><b>USB Host Port Clock</b><br>0 = The 12/48 MHz clock of the USB Host Port is disabled.<br>1 = The 12/48 MHz clock of the USB Host Port is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="PMC_UDP"></a><b>PMC_UDP</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_UDP">AT91C_PMC_UDP</a></font></td><td><b>USB Device Port Clock</b><br>0 = The 48 MHz clock of the USB Device Port is disabled<br>1 = The 48 MHz clock of the USB Device Port is enabled</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="PMC_PCK0"></a><b>PMC_PCK0</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK0">AT91C_PMC_PCK0</a></font></td><td><b>Programmable Clock Output</b><br>0 = The corresponding programmable clock output is disabled.<br>1 = The corresponding programmable clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9</td><td align="CENTER"><a name="PMC_PCK1"></a><b>PMC_PCK1</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK1">AT91C_PMC_PCK1</a></font></td><td><b>Programmable Clock Output</b><br>0 = The corresponding programmable clock output is disabled.<br>1 = The corresponding programmable clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="PMC_HCK0"></a><b>PMC_HCK0</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_HCK0">AT91C_PMC_HCK0</a></font></td><td><b>AHB UHP Clock Output</b><br>0 = The corresponding AHB UHP clock output is disabled.<br>1 = The corresponding AHB UHP clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17</td><td align="CENTER"><a name="PMC_HCK1"></a><b>PMC_HCK1</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_HCK1">AT91C_PMC_HCK1</a></font></td><td><b>AHB LCDC Clock Output</b><br>0 = The corresponding AHB LCDC clock output is disabled.<br>1 = The corresponding AHB LCDC clock output is enabled.</td></tr>
</null></table>
<a name="PMC_SCDR"></a><h4><a href="#PMC">PMC</a>: <i><a href="AT91SAM9260_h.html#AT91_REG">AT91_REG</a></i> PMC_SCDR  <i>System Clock Disable Register</i></h4><ul><null><font size="-2"><li><b>PMC</b> <i><a href="AT91SAM9260_h.html#AT91C_PMC_SCDR">AT91C_PMC_SCDR</a></i> 0xFFFFFC04</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="PMC_PCK"></a><b>PMC_PCK</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK">AT91C_PMC_PCK</a></font></td><td><b>Processor Clock</b><br>0 = The processor clock is disabled<br>1 = The processor clock is enabled</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="PMC_UHP"></a><b>PMC_UHP</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_UHP">AT91C_PMC_UHP</a></font></td><td><b>USB Host Port Clock</b><br>0 = The 12/48 MHz clock of the USB Host Port is disabled.<br>1 = The 12/48 MHz clock of the USB Host Port is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="PMC_UDP"></a><b>PMC_UDP</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_UDP">AT91C_PMC_UDP</a></font></td><td><b>USB Device Port Clock</b><br>0 = The 48 MHz clock of the USB Device Port is disabled<br>1 = The 48 MHz clock of the USB Device Port is enabled</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="PMC_PCK0"></a><b>PMC_PCK0</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK0">AT91C_PMC_PCK0</a></font></td><td><b>Programmable Clock Output</b><br>0 = The corresponding programmable clock output is disabled.<br>1 = The corresponding programmable clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9</td><td align="CENTER"><a name="PMC_PCK1"></a><b>PMC_PCK1</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK1">AT91C_PMC_PCK1</a></font></td><td><b>Programmable Clock Output</b><br>0 = The corresponding programmable clock output is disabled.<br>1 = The corresponding programmable clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="PMC_HCK0"></a><b>PMC_HCK0</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_HCK0">AT91C_PMC_HCK0</a></font></td><td><b>AHB UHP Clock Output</b><br>0 = The corresponding AHB UHP clock output is disabled.<br>1 = The corresponding AHB UHP clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17</td><td align="CENTER"><a name="PMC_HCK1"></a><b>PMC_HCK1</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_HCK1">AT91C_PMC_HCK1</a></font></td><td><b>AHB LCDC Clock Output</b><br>0 = The corresponding AHB LCDC clock output is disabled.<br>1 = The corresponding AHB LCDC clock output is enabled.</td></tr>
</null></table>
<a name="PMC_SCSR"></a><h4><a href="#PMC">PMC</a>: <i><a href="AT91SAM9260_h.html#AT91_REG">AT91_REG</a></i> PMC_SCSR  <i>System Clock Status Register</i></h4><ul><null><font size="-2"><li><b>PMC</b> <i><a href="AT91SAM9260_h.html#AT91C_PMC_SCSR">AT91C_PMC_SCSR</a></i> 0xFFFFFC08</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="PMC_PCK"></a><b>PMC_PCK</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK">AT91C_PMC_PCK</a></font></td><td><b>Processor Clock</b><br>0 = The processor clock is disabled<br>1 = The processor clock is enabled</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="PMC_UHP"></a><b>PMC_UHP</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_UHP">AT91C_PMC_UHP</a></font></td><td><b>USB Host Port Clock</b><br>0 = The 12/48 MHz clock of the USB Host Port is disabled.<br>1 = The 12/48 MHz clock of the USB Host Port is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="PMC_UDP"></a><b>PMC_UDP</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_UDP">AT91C_PMC_UDP</a></font></td><td><b>USB Device Port Clock</b><br>0 = The 48 MHz clock of the USB Device Port is disabled<br>1 = The 48 MHz clock of the USB Device Port is enabled</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="PMC_PCK0"></a><b>PMC_PCK0</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK0">AT91C_PMC_PCK0</a></font></td><td><b>Programmable Clock Output</b><br>0 = The corresponding programmable clock output is disabled.<br>1 = The corresponding programmable clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9</td><td align="CENTER"><a name="PMC_PCK1"></a><b>PMC_PCK1</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_PCK1">AT91C_PMC_PCK1</a></font></td><td><b>Programmable Clock Output</b><br>0 = The corresponding programmable clock output is disabled.<br>1 = The corresponding programmable clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="PMC_HCK0"></a><b>PMC_HCK0</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_HCK0">AT91C_PMC_HCK0</a></font></td><td><b>AHB UHP Clock Output</b><br>0 = The corresponding AHB UHP clock output is disabled.<br>1 = The corresponding AHB UHP clock output is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17</td><td align="CENTER"><a name="PMC_HCK1"></a><b>PMC_HCK1</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_PMC_HCK1">AT91C_PMC_HCK1</a></font></td><td><b>AHB LCDC Clock Output</b><br>0 = The corresponding AHB LCDC clock output is disabled.<br>1 = The corresponding AHB LCDC clock output is enabled.</td></tr>
</null></table>
<a name="PMC_PCER"></a><h4><a href="#PMC">PMC</a>: <i><a href="AT91SAM9260_h.html#AT91_REG">AT91_REG</a></i> PMC_PCER  <i>Peripheral Clock Enable Register</i></h4><ul><null><font size="-2"><li><b>PMC</b> <i><a href="AT91SAM9260_h.html#AT91C_PMC_PCER">AT91C_PMC_PCER</a></i> 0xFFFFFC10</font></null></ul><br>PID2...PID31: Peripheral Identifier 2 to 31<br>0 = No effect.<br>1 = Enables the peripheral clock.<a name="PMC_PCDR"></a><h4><a href="#PMC">PMC</a>: <i><a href="AT91SAM9260_h.html#AT91_REG">AT91_REG</a></i> PMC_PCDR  <i>Peripheral Clock Disable Register</i></h4><ul><null><font size="-2"><li><b>PMC</b> <i><a href="AT91SAM9260_h.html#AT91C_PMC_PCDR">AT91C_PMC_PCDR</a></i> 0xFFFFFC14</font></null></ul><br>PID2...PID31: Peripheral Identifier 2 to 31<br>0 = No effect.<br>1 = Disables the peripheral clock.<a name="PMC_PCSR"></a><h4><a href="#PMC">PMC</a>: <i><a href="AT91SAM9260_h.html#AT91_REG">AT91_REG</a></i> PMC_PCSR  <i>Peripheral Clock Status Register</i></h4><ul><null><font size="-2"><li><b>PMC</b> <i><a href="AT91SAM9260_h.html#AT91C_PMC_PCSR">AT91C_PMC_PCSR</a></i> 0xFFFFFC18</font></null></ul><br>PID2...PID31: Peripheral Identifier 2 to 31<br>0 = peripheral clock disabled.<br>1 = peripheral clock enabled.<a name="CKGR_MOR"></a><h4><a href="#PMC">PMC</a>: <i><a href="AT91SAM9260_h.html#AT91_REG">AT91_REG</a></i> CKGR_MOR  <i>Main Oscillator Register</i></h4><ul><null><font size="-2"><li><b>PMC</b> <i><a href="AT91SAM9260_h.html#AT91C_PMC_MOR">AT91C_PMC_MOR</a></i> 0xFFFFFC20</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="CKGR_MOSCEN"></a><b>CKGR_MOSCEN</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_CKGR_MOSCEN">AT91C_CKGR_MOSCEN</a></font></td><td><b>Main Oscillator Enable</b><br>0 = The main oscillator is disabled.<br>1 = The main oscillator is enabled. OSCBYPASS must be set to 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="CKGR_OSCBYPASS"></a><b>CKGR_OSCBYPASS</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_CKGR_OSCBYPASS">AT91C_CKGR_OSCBYPASS</a></font></td><td><b>Main Oscillator Bypass</b><br>0 = The main oscillator is not bypassed.<br>1 = The main oscillator is bypassed. MOSCEN bit must be set to 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15..8</td><td align="CENTER"><a name="CKGR_OSCOUNT"></a><b>CKGR_OSCOUNT</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_CKGR_OSCOUNT">AT91C_CKGR_OSCOUNT</a></font></td><td><b>Main Oscillator Start-up Time</b><br>Specifies the number of slow clock cycles multiplied by 8 for the main oscillator start-up time.</td></tr>
</null></table>
<a name="CKGR_MCFR"></a><h4><a href="#PMC">PMC</a>: <i><a href="AT91SAM9260_h.html#AT91_REG">AT91_REG</a></i> CKGR_MCFR  <i>Main Clock  Frequency Register</i></h4><ul><null><font size="-2"><li><b>PMC</b> <i><a href="AT91SAM9260_h.html#AT91C_PMC_MCFR">AT91C_PMC_MCFR</a></i> 0xFFFFFC24</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">15..0</td><td align="CENTER"><a name="CKGR_MAINF"></a><b>CKGR_MAINF</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_CKGR_MAINF">AT91C_CKGR_MAINF</a></font></td><td><b>Main Clock Frequency</b><br>Gives the number of main clock cycles within 16 slow clock periods.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="CKGR_MAINRDY"></a><b>CKGR_MAINRDY</b><font size="-2"><br><a href="AT91SAM9260_h.html#AT91C_CKGR_MAINRDY">AT91C_CKGR_MAINRDY</a></font></td><td><b>Main Clock Ready</b><br>0 = FMAIN value is not valid or the main oscillator is disabled.<br>1 = The main oscillator has been enabled previously and MAINF value is available.</td></tr>