at91sam9260.rdf

ATMEL AT91SAM9260的中段控制程序！

AT91C_SMC_CTRL3.address=0xFFFFEC3C
AT91C_SMC_CTRL3.width=32
AT91C_SMC_CTRL3.byteEndian=little
AT91C_SMC_PULSE3.name="AT91C_SMC_PULSE3"
AT91C_SMC_PULSE3.description=" Pulse Register for CS 3"
AT91C_SMC_PULSE3.helpkey=" Pulse Register for CS 3"
AT91C_SMC_PULSE3.access=memorymapped
AT91C_SMC_PULSE3.address=0xFFFFEC34
AT91C_SMC_PULSE3.width=32
AT91C_SMC_PULSE3.byteEndian=little
AT91C_SMC_PULSE0.name="AT91C_SMC_PULSE0"
AT91C_SMC_PULSE0.description=" Pulse Register for CS 0"
AT91C_SMC_PULSE0.helpkey=" Pulse Register for CS 0"
AT91C_SMC_PULSE0.access=memorymapped
AT91C_SMC_PULSE0.address=0xFFFFEC04
AT91C_SMC_PULSE0.width=32
AT91C_SMC_PULSE0.byteEndian=little
AT91C_SMC_CYCLE4.name="AT91C_SMC_CYCLE4"
AT91C_SMC_CYCLE4.description=" Cycle Register for CS 4"
AT91C_SMC_CYCLE4.helpkey=" Cycle Register for CS 4"
AT91C_SMC_CYCLE4.access=memorymapped
AT91C_SMC_CYCLE4.address=0xFFFFEC48
AT91C_SMC_CYCLE4.width=32
AT91C_SMC_CYCLE4.byteEndian=little
AT91C_SMC_SETUP5.name="AT91C_SMC_SETUP5"
AT91C_SMC_SETUP5.description=" Setup Register for CS 5"
AT91C_SMC_SETUP5.helpkey=" Setup Register for CS 5"
AT91C_SMC_SETUP5.access=memorymapped
AT91C_SMC_SETUP5.address=0xFFFFEC50
AT91C_SMC_SETUP5.width=32
AT91C_SMC_SETUP5.byteEndian=little
AT91C_SMC_CYCLE5.name="AT91C_SMC_CYCLE5"
AT91C_SMC_CYCLE5.description=" Cycle Register for CS 5"
AT91C_SMC_CYCLE5.helpkey=" Cycle Register for CS 5"
AT91C_SMC_CYCLE5.access=memorymapped
AT91C_SMC_CYCLE5.address=0xFFFFEC58
AT91C_SMC_CYCLE5.width=32
AT91C_SMC_CYCLE5.byteEndian=little
AT91C_SMC_SETUP6.name="AT91C_SMC_SETUP6"
AT91C_SMC_SETUP6.description=" Setup Register for CS 6"
AT91C_SMC_SETUP6.helpkey=" Setup Register for CS 6"
AT91C_SMC_SETUP6.access=memorymapped
AT91C_SMC_SETUP6.address=0xFFFFEC60
AT91C_SMC_SETUP6.width=32
AT91C_SMC_SETUP6.byteEndian=little
AT91C_SMC_CYCLE6.name="AT91C_SMC_CYCLE6"
AT91C_SMC_CYCLE6.description=" Cycle Register for CS 6"
AT91C_SMC_CYCLE6.helpkey=" Cycle Register for CS 6"
AT91C_SMC_CYCLE6.access=memorymapped
AT91C_SMC_CYCLE6.address=0xFFFFEC68
AT91C_SMC_CYCLE6.width=32
AT91C_SMC_CYCLE6.byteEndian=little
AT91C_SMC_SETUP0.name="AT91C_SMC_SETUP0"
AT91C_SMC_SETUP0.description=" Setup Register for CS 0"
AT91C_SMC_SETUP0.helpkey=" Setup Register for CS 0"
AT91C_SMC_SETUP0.access=memorymapped
AT91C_SMC_SETUP0.address=0xFFFFEC00
AT91C_SMC_SETUP0.width=32
AT91C_SMC_SETUP0.byteEndian=little
AT91C_SMC_CYCLE0.name="AT91C_SMC_CYCLE0"
AT91C_SMC_CYCLE0.description=" Cycle Register for CS 0"
AT91C_SMC_CYCLE0.helpkey=" Cycle Register for CS 0"
AT91C_SMC_CYCLE0.access=memorymapped
AT91C_SMC_CYCLE0.address=0xFFFFEC08
AT91C_SMC_CYCLE0.width=32
AT91C_SMC_CYCLE0.byteEndian=little
AT91C_SMC_SETUP1.name="AT91C_SMC_SETUP1"
AT91C_SMC_SETUP1.description=" Setup Register for CS 1"
AT91C_SMC_SETUP1.helpkey=" Setup Register for CS 1"
AT91C_SMC_SETUP1.access=memorymapped
AT91C_SMC_SETUP1.address=0xFFFFEC10
AT91C_SMC_SETUP1.width=32
AT91C_SMC_SETUP1.byteEndian=little
AT91C_SMC_CTRL5.name="AT91C_SMC_CTRL5"
AT91C_SMC_CTRL5.description=" Control Register for CS 5"
AT91C_SMC_CTRL5.helpkey=" Control Register for CS 5"
AT91C_SMC_CTRL5.access=memorymapped
AT91C_SMC_CTRL5.address=0xFFFFEC5C
AT91C_SMC_CTRL5.width=32
AT91C_SMC_CTRL5.byteEndian=little
AT91C_SMC_PULSE6.name="AT91C_SMC_PULSE6"
AT91C_SMC_PULSE6.description=" Pulse Register for CS 6"
AT91C_SMC_PULSE6.helpkey=" Pulse Register for CS 6"
AT91C_SMC_PULSE6.access=memorymapped
AT91C_SMC_PULSE6.address=0xFFFFEC64
AT91C_SMC_PULSE6.width=32
AT91C_SMC_PULSE6.byteEndian=little
AT91C_SMC_CTRL6.name="AT91C_SMC_CTRL6"
AT91C_SMC_CTRL6.description=" Control Register for CS 6"
AT91C_SMC_CTRL6.helpkey=" Control Register for CS 6"
AT91C_SMC_CTRL6.access=memorymapped
AT91C_SMC_CTRL6.address=0xFFFFEC6C
AT91C_SMC_CTRL6.width=32
AT91C_SMC_CTRL6.byteEndian=little
AT91C_SMC_PULSE7.name="AT91C_SMC_PULSE7"
AT91C_SMC_PULSE7.description=" Pulse Register for CS 7"
AT91C_SMC_PULSE7.helpkey=" Pulse Register for CS 7"
AT91C_SMC_PULSE7.access=memorymapped
AT91C_SMC_PULSE7.address=0xFFFFEC74
AT91C_SMC_PULSE7.width=32
AT91C_SMC_PULSE7.byteEndian=little
AT91C_SMC_CTRL0.name="AT91C_SMC_CTRL0"
AT91C_SMC_CTRL0.description=" Control Register for CS 0"
AT91C_SMC_CTRL0.helpkey=" Control Register for CS 0"
AT91C_SMC_CTRL0.access=memorymapped
AT91C_SMC_CTRL0.address=0xFFFFEC0C
AT91C_SMC_CTRL0.width=32
AT91C_SMC_CTRL0.byteEndian=little
AT91C_SMC_PULSE1.name="AT91C_SMC_PULSE1"
AT91C_SMC_PULSE1.description=" Pulse Register for CS 1"
AT91C_SMC_PULSE1.helpkey=" Pulse Register for CS 1"
AT91C_SMC_PULSE1.access=memorymapped
AT91C_SMC_PULSE1.address=0xFFFFEC14
AT91C_SMC_PULSE1.width=32
AT91C_SMC_PULSE1.byteEndian=little
AT91C_SMC_SETUP7.name="AT91C_SMC_SETUP7"
AT91C_SMC_SETUP7.description=" Setup Register for CS 7"
AT91C_SMC_SETUP7.helpkey=" Setup Register for CS 7"
AT91C_SMC_SETUP7.access=memorymapped
AT91C_SMC_SETUP7.address=0xFFFFEC70
AT91C_SMC_SETUP7.width=32
AT91C_SMC_SETUP7.byteEndian=little
AT91C_SMC_CYCLE7.name="AT91C_SMC_CYCLE7"
AT91C_SMC_CYCLE7.description=" Cycle Register for CS 7"
AT91C_SMC_CYCLE7.helpkey=" Cycle Register for CS 7"
AT91C_SMC_CYCLE7.access=memorymapped
AT91C_SMC_CYCLE7.address=0xFFFFEC78
AT91C_SMC_CYCLE7.width=32
AT91C_SMC_CYCLE7.byteEndian=little
# ========== Register definition for MATRIX peripheral ========== 
AT91C_MATRIX_MCFG1.name="AT91C_MATRIX_MCFG1"
AT91C_MATRIX_MCFG1.description=" Master Configuration Register 1 (rom)    "
AT91C_MATRIX_MCFG1.helpkey=" Master Configuration Register 1 (rom)    "
AT91C_MATRIX_MCFG1.access=memorymapped
AT91C_MATRIX_MCFG1.address=0xFFFFEE04
AT91C_MATRIX_MCFG1.width=32
AT91C_MATRIX_MCFG1.byteEndian=little
AT91C_MATRIX_MCFG1.type=enum
AT91C_MATRIX_MCFG1.enum.0.name=*** Write only ***
AT91C_MATRIX_MCFG1.enum.1.name=Error
AT91C_MATRIX_MRCR.name="AT91C_MATRIX_MRCR"
AT91C_MATRIX_MRCR.description=" Master Remp Control Register "
AT91C_MATRIX_MRCR.helpkey=" Master Remp Control Register "
AT91C_MATRIX_MRCR.access=memorymapped
AT91C_MATRIX_MRCR.address=0xFFFFEF00
AT91C_MATRIX_MRCR.width=32
AT91C_MATRIX_MRCR.byteEndian=little
AT91C_MATRIX_PRAS4.name="AT91C_MATRIX_PRAS4"
AT91C_MATRIX_PRAS4.description=" PRAS4 (periph) "
AT91C_MATRIX_PRAS4.helpkey=" PRAS4 (periph) "
AT91C_MATRIX_PRAS4.access=memorymapped
AT91C_MATRIX_PRAS4.address=0xFFFFEEA0
AT91C_MATRIX_PRAS4.width=32
AT91C_MATRIX_PRAS4.byteEndian=little
AT91C_MATRIX_SCFG4.name="AT91C_MATRIX_SCFG4"
AT91C_MATRIX_SCFG4.description=" Slave Configuration Register 4 (bridge)    "
AT91C_MATRIX_SCFG4.helpkey=" Slave Configuration Register 4 (bridge)    "
AT91C_MATRIX_SCFG4.access=memorymapped
AT91C_MATRIX_SCFG4.address=0xFFFFEE50
AT91C_MATRIX_SCFG4.width=32
AT91C_MATRIX_SCFG4.byteEndian=little
AT91C_MATRIX_MCFG2.name="AT91C_MATRIX_MCFG2"
AT91C_MATRIX_MCFG2.description=" Master Configuration Register 2 (hperiphs) "
AT91C_MATRIX_MCFG2.helpkey=" Master Configuration Register 2 (hperiphs) "
AT91C_MATRIX_MCFG2.access=memorymapped
AT91C_MATRIX_MCFG2.address=0xFFFFEE08
AT91C_MATRIX_MCFG2.width=32
AT91C_MATRIX_MCFG2.byteEndian=little
AT91C_MATRIX_MCFG2.type=enum
AT91C_MATRIX_MCFG2.enum.0.name=*** Write only ***
AT91C_MATRIX_MCFG2.enum.1.name=Error
AT91C_MATRIX_MCFG0.name="AT91C_MATRIX_MCFG0"
AT91C_MATRIX_MCFG0.description=" Master Configuration Register 0 (ram96k)     "
AT91C_MATRIX_MCFG0.helpkey=" Master Configuration Register 0 (ram96k)     "
AT91C_MATRIX_MCFG0.access=memorymapped
AT91C_MATRIX_MCFG0.address=0xFFFFEE00
AT91C_MATRIX_MCFG0.width=32
AT91C_MATRIX_MCFG0.byteEndian=little
AT91C_MATRIX_MCFG0.type=enum
AT91C_MATRIX_MCFG0.enum.0.name=*** Write only ***
AT91C_MATRIX_MCFG0.enum.1.name=Error
AT91C_MATRIX_MCFG3.name="AT91C_MATRIX_MCFG3"
AT91C_MATRIX_MCFG3.description=" Master Configuration Register 3 (ebi)"
AT91C_MATRIX_MCFG3.helpkey=" Master Configuration Register 3 (ebi)"
AT91C_MATRIX_MCFG3.access=memorymapped
AT91C_MATRIX_MCFG3.address=0xFFFFEE0C
AT91C_MATRIX_MCFG3.width=32
AT91C_MATRIX_MCFG3.byteEndian=little
AT91C_MATRIX_MCFG3.type=enum
AT91C_MATRIX_MCFG3.enum.0.name=*** Write only ***
AT91C_MATRIX_MCFG3.enum.1.name=Error
AT91C_MATRIX_MCFG4.name="AT91C_MATRIX_MCFG4"
AT91C_MATRIX_MCFG4.description=" Master Configuration Register 4 (bridge)    "
AT91C_MATRIX_MCFG4.helpkey=" Master Configuration Register 4 (bridge)    "
AT91C_MATRIX_MCFG4.access=memorymapped
AT91C_MATRIX_MCFG4.address=0xFFFFEE10
AT91C_MATRIX_MCFG4.width=32
AT91C_MATRIX_MCFG4.byteEndian=little
AT91C_MATRIX_MCFG4.type=enum
AT91C_MATRIX_MCFG4.enum.0.name=*** Write only ***
AT91C_MATRIX_MCFG4.enum.1.name=Error
AT91C_MATRIX_MCFG5.name="AT91C_MATRIX_MCFG5"
AT91C_MATRIX_MCFG5.description=" Master Configuration Register 5 (mailbox)    "
AT91C_MATRIX_MCFG5.helpkey=" Master Configuration Register 5 (mailbox)    "
AT91C_MATRIX_MCFG5.access=memorymapped
AT91C_MATRIX_MCFG5.address=0xFFFFEE14
AT91C_MATRIX_MCFG5.width=32
AT91C_MATRIX_MCFG5.byteEndian=little
AT91C_MATRIX_MCFG5.type=enum
AT91C_MATRIX_MCFG5.enum.0.name=*** Write only ***
AT91C_MATRIX_MCFG5.enum.1.name=Error
AT91C_MATRIX_PRAS0.name="AT91C_MATRIX_PRAS0"
AT91C_MATRIX_PRAS0.description=" PRAS0 (ram0) "
AT91C_MATRIX_PRAS0.helpkey=" PRAS0 (ram0) "
AT91C_MATRIX_PRAS0.access=memorymapped
AT91C_MATRIX_PRAS0.address=0xFFFFEE80
AT91C_MATRIX_PRAS0.width=32
AT91C_MATRIX_PRAS0.byteEndian=little
AT91C_MATRIX_PRAS1.name="AT91C_MATRIX_PRAS1"
AT91C_MATRIX_PRAS1.description=" PRAS1 (ram1) "
AT91C_MATRIX_PRAS1.helpkey=" PRAS1 (ram1) "
AT91C_MATRIX_PRAS1.access=memorymapped
AT91C_MATRIX_PRAS1.address=0xFFFFEE88
AT91C_MATRIX_PRAS1.width=32
AT91C_MATRIX_PRAS1.byteEndian=little
AT91C_MATRIX_PRAS2.name="AT91C_MATRIX_PRAS2"
AT91C_MATRIX_PRAS2.description=" PRAS2 (ram2) "
AT91C_MATRIX_PRAS2.helpkey=" PRAS2 (ram2) "
AT91C_MATRIX_PRAS2.access=memorymapped
AT91C_MATRIX_PRAS2.address=0xFFFFEE90
AT91C_MATRIX_PRAS2.width=32
AT91C_MATRIX_PRAS2.byteEndian=little
AT91C_MATRIX_PRAS3.name="AT91C_MATRIX_PRAS3"
AT91C_MATRIX_PRAS3.description=" PRAS3 (ebi) "
AT91C_MATRIX_PRAS3.helpkey=" PRAS3 (ebi) "
AT91C_MATRIX_PRAS3.access=memorymapped
AT91C_MATRIX_PRAS3.address=0xFFFFEE98
AT91C_MATRIX_PRAS3.width=32
AT91C_MATRIX_PRAS3.byteEndian=little
AT91C_MATRIX_SCFG2.name="AT91C_MATRIX_SCFG2"
AT91C_MATRIX_SCFG2.description=" Slave Configuration Register 2 (hperiphs) "
AT91C_MATRIX_SCFG2.helpkey=" Slave Configuration Register 2 (hperiphs) "
AT91C_MATRIX_SCFG2.access=memorymapped
AT91C_MATRIX_SCFG2.address=0xFFFFEE48
AT91C_MATRIX_SCFG2.width=32
AT91C_MATRIX_SCFG2.byteEndian=little
AT91C_MATRIX_SCFG0.name="AT91C_MATRIX_SCFG0"
AT91C_MATRIX_SCFG0.description=" Slave Configuration Register 0 (ram96k)     "
AT91C_MATRIX_SCFG0.helpkey=" Slave Configuration Register 0 (ram96k)     "
AT91C_MATRIX_SCFG0.access=memorymapped
AT91C_MATRIX_SCFG0.address=0xFFFFEE40
AT91C_MATRIX_SCFG0.width=32
AT91C_MATRIX_SCFG0.byteEndian=little
AT91C_MATRIX_SCFG3.name="AT91C_MATRIX_SCFG3"
AT91C_MATRIX_SCFG3.description=" Slave Configuration Register 3 (ebi)"
AT91C_MATRIX_SCFG3.helpkey=" Slave Configuration Register 3 (ebi)"
AT91C_MATRIX_SCFG3.access=memorymapped
AT91C_MATRIX_SCFG3.address=0xFFFFEE4C
AT91C_MATRIX_SCFG3.width=32
AT91C_MATRIX_SCFG3.byteEndian=little
AT91C_MATRIX_SCFG1.name="AT91C_MATRIX_SCFG1"
AT91C_MATRIX_SCFG1.description=" Slave Configuration Register 1 (rom)    "
AT91C_MATRIX_SCFG1.helpkey=" Slave Configuration Register 1 (rom)    "
AT91C_MATRIX_SCFG1.access=memorymapped
AT91C_MATRIX_SCFG1.address=0xFFFFEE44
AT91C_MATRIX_SCFG1.width=32
AT91C_MATRIX_SCFG1.byteEndian=little
# ========== Register definition for CCFG peripheral ========== 
AT91C_CCFG_MATRIXVERSION.name="AT91C_CCFG_MATRIXVERSION"
AT91C_CCFG_MATRIXVERSION.description=" Version Register"
AT91C_CCFG_MATRIXVERSION.helpkey=" Version Register"
AT91C_CCFG_MATRIXVERSION.access=memorymapped
AT91C_CCFG_MATRIXVERSION.address=0xFFFFEFFC
AT91C_CCFG_MATRIXVERSION.width=32
AT91C_CCFG_MATRIXVERSION.byteEndian=little
AT91C_CCFG_MATRIXVERSION.permission.write=none
AT91C_CCFG_EBICSA.name="AT91C_CCFG_EBICSA"
AT91C_CCFG_EBICSA.description=" EBI Chip Select Assignement Register"
AT91C_CCFG_EBICSA.helpkey=" EBI Chip Select Assignement Register"
AT91C_CCFG_EBICSA.access=memorymapped
AT91C_CCFG_EBICSA.address=0xFFFFEF1C
AT91C_CCFG_EBICSA.width=32
AT91C_CCFG_EBICSA.byteEndian=little
# ========== Register definition for PDC_DBGU peripheral ========== 
AT91C_DBGU_TNCR.name="AT91C_DBGU_TNCR"
AT91C_DBGU_TNCR.description="Transmit Next Counter Register"
AT91C_DBGU_TNCR.helpkey="Transmit Next Counter Register"
AT91C_DBGU_TNCR.access=memorymapped
AT91C_DBGU_TNCR.address=0xFFFFF31C
AT91C_DBGU_TNCR.width=32
AT91C_DBGU_TNCR.byteEndian=little
AT91C_DBGU_RNCR.name="AT91C_DBGU_RNCR"
AT91C_DBGU_RNCR.description="Receive Next Counter Register"
AT91C_DBGU_RNCR.helpkey="Receive Next Counter Register"
AT91C_DBGU_RNCR.access=memorymapped
AT91C_DBGU_RNCR.address=0xFFFFF314
AT91C_DBGU_RNCR.width=32
AT91C_DBGU_RNCR.byteEndian=little
AT91C_DBGU_PTCR.name="AT91C_DBGU_PTCR"
AT91C_DBGU_PTCR.description="PDC Transfer Control Register"
AT91C_DBGU_PTCR.helpkey="PDC Transfer Control Register"
AT91C_DBGU_PTCR.access=memorymapped
AT91C_DBGU_PTCR.address=0xFFFFF320
AT91C_DBGU_PTCR.width=32
AT91C_DBGU_PTCR.byteEndian=little
AT91C_DBGU_PTCR.type=enum
AT91C_DBGU_PTCR.enum.0.name=*** Write only ***
AT91C_DBGU_PTCR.enum.1.name=Error
AT91C_DBGU_PTSR.name="AT91C_DBGU_PTSR"
AT91C_DBGU_PTSR.description="PDC Transfer Status Register"
AT91C_DBGU_PTSR.helpkey="PDC Transfer Status Register"
AT91C_DBGU_PTSR.access=memorymapped
AT91C_DBGU_PTSR.address=0xFFFFF324
AT91C_DBGU_PTSR.width=32
AT91C_DBGU_PTSR.byteEndian=little
AT91C_DBGU_PTSR.permission.write=none
AT91C_DBGU_RCR.name="AT91C_DBGU_RCR"