usb.h

基于ADSP-BF535 USB驱动应用程序

#ifndef _USB_H
#define _USB_H
#include "dtype.h"

/********************************************************************
	USB Descriptor constant
*********************************************************************/
enum {DEVICE_DESCR=1,CONFIG_DESCR,STRING_DESCR,IFACE_DESCR,EP_DESCR};


/********************************************************************
	Constant definition
*********************************************************************/
enum	{EP_OUT=0, EP_IN};
enum	{EP_CTL=0, EP_ISO, EP_BULK, EP_INT};
enum	{EP0=0, EP1, EP2, EP3, EP4, EP5, EP6, EP7};
enum	{LOG_EP0=0, LOG_EP1, LOG_EP2, LOG_EP3, LOG_EP4, LOG_EP5, LOG_EP6, 
		 LOG_EP7, LOG_EP8, LOG_EP9, LOG_EP10, LOG_EP11, LOG_EP12,LOG_EP13,
		 LOG_EP14, LOG_EP15};

enum	{EP_ALT0=0, EP_ALT1};
enum	{EP_IFACE0=0, EP_IFACE1};
enum	{EP_CONFIG0=0,EP_CONFIG1};
enum	{USBD_MAX_8=0, USBD_MAX_16, USBD_MAX_32, USBD_MAX_64};
enum	{USBD_TYP_CTL=0, USBD_TYP_BULK, USBD_TYP_INT, USBD_TYP_ISO};

#define EP_BUF_SZ			5
#define	NUM_EPBUF_RDY_CHK	0xF
#define	MAX_PHY_EP			8
#define	MAX_EP_CONFIG		2
#define MAX_EP_ALT			2
#define MAX_EP_IFACE		2
#define MAX_EP_BUF			(MAX_PHY_EP*MAX_EP_CONFIG*MAX_EP_ALT*MAX_EP_IFACE)

/********************************************************************
	Register Bits definition
*********************************************************************/

// USB Device ID Register (USBD_ID)
#define GET_USBD_ID_PID(reg,val) val=(USHORT)(reg&0x07)
#define	GET_USBD_ID_SPEC(reg,val) val=(USHORT)((reg>>4)&0x0FFF)

// Current USB Frame Number Register (USBD_FRM) 
// Safe Guarding Mask.
#define	USBD_FRM_SGMSK			0x07FF

// Match Value for USB Frame Number Register (USBD_FRMAT) 
// Safe Guarding Mask
#define USBD_FRMAT_SGMSK		0x07FF

// Enable Download of Configuration into UDC Core Register
// (USBD_EPBUF) Safe Guarding Mask
#define USBD_EPBUF_EPDOWN_SGMSK	0x00FF
// Enable Download of Configuration into UDC Core Register (USBD_EPBUF)
#define USBD_EPBUF_RDY			1<<14
#define	USBD_EPBUF_CFG			1<<15

// USBD Module Status Register (USBD_STAT)
#define	USBD_STAT_SUSPENDED		1<<0
#define USBD_STAT_RSTSIG		1<<1
#define USBD_STAT_SIP			1<<2
#define USBD_STAT_PIP			1<<3
#define GET_USBD_STAT_EP(reg,val) val=(USHORT)((reg>>4)&0x7)
#define GET_USBD_STAT_AIF(reg,val) val=(USHORT)((reg>>7)&0x7)
#define GET_USBD_STAT_IF(reg,val) val=(USHORT)((reg>>10)&0x3)
#define GET_USBD_STAT_CFG(reg,val) val=(USHORT)((reg>>12)&0x3)

// USBD Module Configuration and Control Register (USBD_CTRL)
#define	USBD_CTRL_ENA			1<<0
#define	USBD_CTRL_UDCRST		1<<1
#define	USBD_CTRL_EP0STALL		1<<8
#define	USBD_CTRL_EP1STALL		1<<9
#define	USBD_CTRL_EP2STALL		1<<10
#define	USBD_CTRL_EP3STALL		1<<11
#define	USBD_CTRL_EP4STALL		1<<12
#define	USBD_CTRL_EP5STALL		1<<13
#define	USBD_CTRL_EP6STALL		1<<14
#define	USBD_CTRL_EP7STALL		1<<15

// USBD Global Interrupt Register (USBD_GINTR)
#define	USBD_GINTR_SOF			1<<0
#define	USBD_GINTR_CFG			1<<1
#define	USBD_GINTR_MSOF			1<<2
#define	USBD_GINTR_RST			1<<3
#define	USBD_GINTR_SUSP			1<<4
#define	USBD_GINTR_RESUME		1<<5
#define	USBD_GINTR_FRMMAT		1<<6
#define	USBD_GINTR_DMAIRQ		1<<7
#define	USBD_GINTR_EP0INT		1<<8
#define	USBD_GINTR_EP1INT		1<<9
#define	USBD_GINTR_EP2INT		1<<10
#define	USBD_GINTR_EP3INT		1<<11
#define	USBD_GINTR_EP4INT		1<<12
#define	USBD_GINTR_EP5INT		1<<13
#define	USBD_GINTR_EP6INT		1<<14
#define	USBD_GINTR_EP7INT		1<<15

// USBD Global Interrupt Mask Register (USBD_GMASK)
#define	USBD_GMASK_SOFM			1<<0
#define	USBD_GMASK_CFGM			1<<1
#define	USBD_GMASK_MSOFM		1<<2
#define	USBD_GMASK_RSTM			1<<3
#define	USBD_GMASK_SUSPM		1<<4
#define	USBD_GMASK_RESUMEM		1<<5
#define	USBD_GMASK_FRMMATM		1<<6
#define	USBD_GMASK_DMAIRQM		1<<7
#define	USBD_GMASK_EP0MSK		1<<8
#define	USBD_GMASK_EP1MSK		1<<9
#define	USBD_GMASK_EP2MSK		1<<10
#define	USBD_GMASK_EP3MSK		1<<11
#define	USBD_GMASK_EP4MSK		1<<12
#define	USBD_GMASK_EP5MSK		1<<13
#define	USBD_GMASK_EP6MSK		1<<14
#define	USBD_GMASK_EP7MSK		1<<15

// USBD DMA Master Channel Configuration Register (USBD_DMACFG)
#define	USBD_DMACFG_DMAEN		1<<0
#define	USBD_DMACFG_IOC			1<<2
#define	USBD_DMACFG_DMABC		1<<7
#define SET_USBD_DMACFG_DMABS(reg,val) reg|=(USHORT)((val&0x0)<<12)
#define GET_USBD_DMACFG_DMABS(reg,val) val=(USHORT)((reg>>12)&0x3)

// DMA Master Channel Base Address, Low Register (USBD_DMABL)
#define	SET_USBD_DMABL(reg,val) reg|=(USHORT)((val&0x1F)<<11)
#define GET_USBD_DMABL(reg,val) val=(USHORT)((reg>>11)&0x1F)

// DMA Master Channel Base Address, High Register (USBD_DMABL)
// Safe Guding Mask
#define USBD_DMABL_SGMSK	0xF800


// DMA Master Channel Base Address, High Register (USBD_DMABH)
// Safe Guding Mask
#define USBD_DMABH_SGMSK	0xFFFF

// DMA Master Channel Count Register (USBD_DMACT)
// Safe Guarding Mask
#define USBD_DMACT_SGMSK	0xFFFF

// DMA Master Channel DMA Interrupt Register (USBD_DMAIRQ)
#define	USBD_DMAIRQ_DMA_COMP	1<<0
#define	USBD_DMAIRQ_DMA_ERROR	1<<2

// USBD Endpoint x interrupt Register (USBD_INTRx)
#define	USBD_INTR_TC		1<<0
#define	USBD_INTR_PC		1<<1
#define	USBD_INTR_BCSTAT	1<<2
#define	USBD_INTR_SETUP		1<<3
#define	USBD_INTR_MSETUP	1<<4
#define	USBD_INTR_MERR		1<<5

// USB Endpoint x Mask Register (USBD_MASKx)
#define	USBD_MASK_TC		1<<0
#define	USBD_MASK_PC		1<<1
#define	USBD_MASK_BCSTAT	1<<2
#define	USBD_MASK_SETUP		1<<3
#define	USBD_MASK_MSETUP	1<<4
#define	USBD_MASK_MERR		1<<5

// USB Endpoint x Control Register (USBD_EPCFGx)
#define	USBD_EPCFG_ARM		1<<0
#define	USBD_EPCFG_DIR		1<<1
#define SET_USBD_TYP(reg,val)	reg|=(USHORT)(val<<2)
#define SET_USBD_MAX(reg,val)	reg|=(USHORT)(val<<4)
#define GET_USBD_TYP(reg,val)	val=(USHORT)((reg>>2)&0x3)
#define GET_USBD_MAX(reg,val)	val=(USHORT)((reg>>4)&0x3)

#define GET_USBD_CONFIG(reg) ((reg >> 12) & 0x03)
#define GET_USBD_INTERFACE(reg) ((reg >> 10) & 0x03)
#define GET_USBD_ALTSETTING(reg) ((reg >> 7) & 0x07)

#define GetMaxPacketSizeCode(a) (\
	(a >= 64) ? USBD_MAX_64 : ( \
		(a == 32) ? USBD_MAX_32 : ( \
			(a == 16) ? USBD_MAX_16 : USBD_MAX_8 \
		) \
	) \
)


#define USB_ENDPOINT_DIRECTION_IN( in ) ((in ? EP_IN : EP_OUT) << 7)

// USB Endpoint x Address Offset Registers (USBD_EPADRx)
// Safe Guarding Mask
#define	USBD_OFFSET_SGMSK	0x07FF

// USB Endpoint x Buffer Length Register (USBD_EPLENx)
// Safe Guarding Mask		
#define USBD_EPLEN_SGMSK	0x03FF

/********************************************************************
	Structures
*********************************************************************/
typedef struct _EP_BUF_INFO
{
	UINT	ep_bufadrptr:16;		// 0:15
	UINT	ep_userbit:1;			// 16
	UINT	ep_maxpktsize:10;		// 17:26
	UINT	ep_dir:1;				// 27
	UINT	ep_type:2;				// 28:29
	UINT	ep_altsetting:2;		// 30:31
	UCHAR	ep_interface:2;			// 0:1
	UCHAR	ep_config:2;			// 2:3
	UCHAR	epnum:4;				// 4:7
} EP_BUF_INFO, * PEP_BUF_INFO;


typedef union	_EP_BUF
{
	EP_BUF_INFO	s_ep_buf;
	UCHAR		a_ep_buf[EP_BUF_SZ];
} EP_BUF, *PEP_BUF;


#endif