deccount.fit.eqn

altera Quartus II 減法器使用 配合LED

--C1_q[3] is lpm_counter:reg_G_Counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3] at LC7_F20
--operation mode is up_dn_cntr

C1_q[3]_lut_out = (C1_q[3] $ C1L7 & A1L6) # (A1L5 & !A1L6);
C1_q[3] = DFFEA(C1_q[3]_lut_out, GLOBAL(i4), , , , , );


--C1_q[2] is lpm_counter:reg_G_Counter_rtl_0|alt_counter_f10ke:wysi_counter|q[2] at LC6_F20
--operation mode is up_dn_cntr

C1_q[2]_lut_out = (C1_q[2] $ C1L5 & A1L6) # (A1L4 & !A1L6);
C1_q[2] = DFFEA(C1_q[2]_lut_out, GLOBAL(i4), , , , , );

--C1L7 is lpm_counter:reg_G_Counter_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC6_F20
--operation mode is up_dn_cntr

C1L7 = CARRY(!C1_q[2] & C1L5);


--C1_q[1] is lpm_counter:reg_G_Counter_rtl_0|alt_counter_f10ke:wysi_counter|q[1] at LC5_F20
--operation mode is up_dn_cntr

C1_q[1]_lut_out = (C1_q[1] $ C1L3 & A1L6) # (A1L3 & !A1L6);
C1_q[1] = DFFEA(C1_q[1]_lut_out, GLOBAL(i4), , , , , );

--C1L5 is lpm_counter:reg_G_Counter_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC5_F20
--operation mode is up_dn_cntr

C1L5 = CARRY(!C1_q[1] & C1L3);


--C1_q[0] is lpm_counter:reg_G_Counter_rtl_0|alt_counter_f10ke:wysi_counter|q[0] at LC4_F20
--operation mode is up_dn_cntr

C1_q[0]_lut_out = (!C1_q[0] & A1L6) # (A1L11 & !A1L6);
C1_q[0] = DFFEA(C1_q[0]_lut_out, GLOBAL(i4), , , , , );

--C1L3 is lpm_counter:reg_G_Counter_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC4_F20
--operation mode is up_dn_cntr

C1L3 = CARRY(!C1_q[0]);


--A1L8Q is OUTCLK~reg0 at LC1_F20
--operation mode is normal

A1L8Q_lut_out = !C1_q[3] & !C1_q[2] & !C1_q[1] & !C1_q[0];
A1L8Q = DFFEA(A1L8Q_lut_out, GLOBAL(i4), , , , , );


--A1L6 is i~87 at LC2_F20
--operation mode is normal

A1L6 = C1_q[3] # C1_q[2] # C1_q[1] # C1_q[0];


--reg_G_divide is reg_G_divide at LC2_F26
--operation mode is normal

reg_G_divide_lut_out = !reg_G_divide;
reg_G_divide = DFFEA(reg_G_divide_lut_out, A1L8Q, , , , , );


--i4 is i4 at LC1_F26
--operation mode is normal

i4 = reg_G_divide $ INCLK;


--A1L5 is i~20 at LC3_F20
--operation mode is normal

A1L5 = PRESET[3] $ (!PRESET[2] & !PRESET[0] & !PRESET[1]);


--A1L4 is i~15 at LC8_F20
--operation mode is normal

A1L4 = PRESET[2] $ (!PRESET[0] & !PRESET[1]);


--A1L3 is i~10 at LC2_F24
--operation mode is normal

A1L3 = PRESET[0] $ !PRESET[1];


--INCLK is INCLK at Pin_125
--operation mode is input

INCLK = INPUT();


--PRESET[2] is PRESET[2] at Pin_56
--operation mode is input

PRESET[2] = INPUT();


--PRESET[0] is PRESET[0] at Pin_124
--operation mode is input

PRESET[0] = INPUT();


--PRESET[1] is PRESET[1] at Pin_54
--operation mode is input

PRESET[1] = INPUT();


--PRESET[3] is PRESET[3] at Pin_55
--operation mode is input

PRESET[3] = INPUT();


--OUTCLK is OUTCLK at Pin_30
--operation mode is output

OUTCLK = OUTPUT(A1L8Q);


--A1L11 is PRESET[0]~21 at LC1_F24
--operation mode is normal

A1L11 = !PRESET[0];