fw.c

CY7C68033芯片 USB DEVICE 代码；标准c代码

         case SC_SET_CONFIGURATION:               // *** Set Configuration
            Configuration = setupdat2;
            break;
         case SC_GET_CONFIGURATION:               // *** Get Configuration
            EP0BUF[0] = Configuration;
            EP0BCL = 1;
            break;
         case SC_GET_STATUS:                 // *** Get Status
               switch(setupdat0)
               {
                  case GS_DEVICE:            // Device
                     EP0BUF[0] = 0x01;       // Bit 0 -- 1 = self-power, 0 = bus power
                     EP0BUF[1] = 0;          // Bit 1 -- remote wakeup enabled (0 for us)
                     EP0BCL = 2;
                     break;
                  case GS_INTERFACE:         // Interface
                     EP0BUF[0] = 0;
                     EP0BUF[1] = 0;
                     EP0BCL = 2;
                     break;
                  case GS_ENDPOINT:         // End Point
                     if (setupdat4 == 0x2)
                     {
                        EP0BUF[0] = (P_EP2CS & bmEPSTALL);
                     }
                     else if (setupdat4 == 0x84)
                     {
                        EP0BUF[0] = (P_EP4CS & bmEPSTALL);
                     }
                     else if (setupdat4 == 0x00)
                     {
                        EP0BUF[0] = 0x00;
                     }
                     else
                     {
                        EZUSB_STALL_EP0();   // Stall End Point 0
                        break;
                     }
   
                     EP0BUF[1] = 0;
                     EP0BCL = 2;
                     break;
                  default:                   // Invalid Command
                     EZUSB_STALL_EP0();      // Stall End Point 0
               }
            break;
         case SC_CLEAR_FEATURE:                  // *** Clear Feature
               switch(setupdat0)
               {
                  case FT_DEVICE:            // Device
                        EZUSB_STALL_EP0();   // Stall End Point 0
                     break;
                  case FT_ENDPOINT:          // End Point
                     if(setupdat2 == 0)
                     {
                        // do not clear endpoint STALLs if we received an invalid CBW.
                        // The BOT MSC Spec says we must stay STALL'd until we get reset
                        if (!phaseErrorState)
                        {
                           if (setupdat4 == 0x2)
                           {
                              ResetAndArmEp2();
                              TOGCTL = 0x2;
                              TOGCTL = 0x22;       // reset data toggle
                              P_EP2CS = 0;         // Clear stall bit
                           }
                           else if (setupdat4 == 0x84)
                           {
                              TOGCTL = 0x14;
                              TOGCTL = 0x34;       // reset data toggle
                              P_EP4CS = 0;         // Clear stall bit
                           }
                           else if (setupdat4 == 0x0)
                           {
                                 // EP0 STALLs are auto-clear
                           }
                           else
                              EZUSB_STALL_EP0();   // Stall End Point 0
                        }
                     }
                     else
                        EZUSB_STALL_EP0();      // Stall End Point 0
                     break;
                  default:
                     EZUSB_STALL_EP0();      // Stall End Point 0
               }  
            break;
         case SC_SET_FEATURE:                  // *** Set Feature
               switch(setupdat0)
               {
                  case FT_DEVICE:            // Device
                     if(setupdat2 == 2)
                        // Set Feature Test Mode.  The core handles this request.  However, it is
                        // necessary for the firmware to complete the handshake phase of the
                        // control transfer before the chip will enter test mode.  It is also
                        // necessary for FX2 to be physically disconnected (D+ and D-)
                        // from the host before it will enter test mode.
                        break;
                     else
                        EZUSB_STALL_EP0();   // Stall End Point 0
                     break;
                  case FT_ENDPOINT:          // End Point
                     if(setupdat2 == 0)
                        {
                        if (setupdat4 == 0x2)
                           P_EP2CS = bmEPSTALL;       // Set stall bit
                        else if (setupdat4 == 0x84)
                           P_EP4CS = bmEPSTALL;       // Set stall bit
                        else
                           EZUSB_STALL_EP0();   // Stall End Point 0
                        }
                     else
                        EZUSB_STALL_EP0();   // Stall End Point 0
                     break;
                  default:
                     EZUSB_STALL_EP0();      // Stall End Point 0
               }  
            break;
   
         default:                            // *** Invalid Command
               EZUSB_STALL_EP0();            // Stall End Point 0
         }
      }
   else if ((setupdat0 & SETUP_MASK) == SETUP_CLASS_REQUEST)
   {
      switch(SETUPDAT[1])
         {
         case SC_MASS_STORAGE_RESET:
               // Verify that the command is actually a MS reset command sent to the proper interface
               if (setupdat0 == 0x21 && setupdat4 == 0)  // Our interface number is hard coded (0) in DSCR.A51
               {
                  // All we really need to do in response to a MSC Reset is restart using
                  // a soft reset (jump to 0x00).  This will re-initialize the drive and
                  // endpoints.
                  EZUSB_IRQ_CLEAR();
                  INT2CLR = bmSUDAV;         // Clear SUDAV IRQ
      
                  // force a soft reset after the iret.
                  EA = 0;
                  softReset();
               }
               else
                  EZUSB_STALL_EP0();   // Stall End Point 0
               break;
      
         case SC_GET_MAX_LUN:
            if (setupdat0 == 0xa1 && setupdat4 == 0)  // Our interface number is hard coded (0) in DSCR.A51
            {
#ifdef USE_2LUN
               EP0BUF[0] = 1;          // 2 LUNs
#else
               EP0BUF[0] = 0;
#endif
               EP0BCL = 1;
            }
            else
               EZUSB_STALL_EP0();      // Stall End Point 0
            break;

#ifdef HID
         case SC_HID_SET_IDLE: break;
#endif

         default:                      // *** Invalid Command
               EZUSB_STALL_EP0();      // Stall End Point 0

         } // End Switch
   } // end elseif
   else
       EZUSB_STALL_EP0();              // Stall End Point 0

   // Acknowledge handshake phase of device request
   EP0CS |= bmHSNAK;
}

//-----------------------------------------------------------------------------
// Wake-up interrupt handler
//-----------------------------------------------------------------------------
void resume_isr(void) interrupt     WKUP_VECT
{
   EZUSB_CLEAR_RSMIRQ();
}

//-----------------------------------------------------------------------------
// General Send Descriptor subroutine
// Note: Transfer length is 64 max
//-----------------------------------------------------------------------------
void sendDescriptor(BYTE offset, BYTE len)
{
   BYTE j;

   AUTOPTR1H = MSB(halfKBuffer);
   AUTOPTR1L = offset;
   for(j=0;j<64;j++) EP0BUF[j]=P_XAUTODAT1;
   if (len==0) len = EP0BUF[0];
   if (!SETUPDAT[7])
      len = min(len, SETUPDAT[6]);
   EP0BCL = len;
}