6812dp256.h

uCOSII 移植实例程序

/*****************************************************
    6812dp256.h - Target interface library
    Describes I/O registers of MC68HC12DP256
 ----------------------------------------------------
   Copyright (c) Metrowerks, Basel, Switzerland
                  Do not modify!
 *****************************************************/

/****************************************************************************/
/*      The M68HC12DP256 MCU is equipped with several devices, which share  */
/*      the same architecture. There are 2 Analog to Digital converter      */
/*      (ATD0 and ATD1), 2 Serial Communication Interface (SCI0 and SCI1),  */
/*      3 Serial Peripheral Interface (SPI0, SPI1 and SPI2), 5 CAN module   */
/*      (CAN0, CAN1, CAN2, CAN3 and CAN4). The bits inside of the registers */
/*      for for two similar devices  share the same name. In order to be    */
/*      able to access the single bits in the diferent devices, a suffix    */
/*      has beenadded to the different bit mnemeonics.                      */
/*      _0 has been added to the bit mnemonics inside of ATD0, SCI0, SPI0   */
/*         and CAN0                                                         */
/*      _1 has been added to the bit mnemonics inside of ATD1, SCI1, SPI1   */
/*         and CAN1                                                         */
/*      _2 has been added to the bit mnemonics inside of SPI2 and CAN2      */
/*      _3 has been added to the bit mnemonics inside of CAN3               */
/*      _4 has been added to the bit mnemonics inside of CAN4               */
/*       Example TIE_0 refers to bit 7 in SCI0CR2 register                  */
/*               TIE_1 refers to bit 7 in SCI1CR2 register                  */
/****************************************************************************/


#ifndef __6812DP256_H__
#define __6812DP256_H__

#include <stdtypes.h>

#define _IO_BASE_ADDR 0
#define _IO_AT(x)  @(_IO_BASE_ADDR+(x))

#ifndef __DECL__6812DP256_H__
#define __DECL__6812DP256_H__  extern
#endif

#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */

/**************************************************************************************************/
/*                                         DEFINE PORT A                                          */
/**************************************************************************************************/
__DECL__6812DP256_H__ volatile   union {                  
  struct {          
    unsigned char BIT0:1;
    unsigned char BIT1:1;
    unsigned char BIT2:1;
    unsigned char BIT3:1;
    unsigned char BIT4:1;
    unsigned char BIT5:1;
    unsigned char BIT6:1;
    unsigned char BIT7:1;
  } PORTA_BITS;        
  unsigned char PORTA_BYTE;  
}PORTA_  _IO_AT(0x00);  /* port A */

/* DEFINE REGISTER */        
#define PORTA PORTA_.PORTA_BYTE

/*DEFINE REGISTER BITS*/
#define PORTA0 PORTA_.PORTA_BITS.BIT0
#define PORTA1 PORTA_.PORTA_BITS.BIT1
#define PORTA2 PORTA_.PORTA_BITS.BIT2
#define PORTA3 PORTA_.PORTA_BITS.BIT3
#define PORTA4 PORTA_.PORTA_BITS.BIT4
#define PORTA5 PORTA_.PORTA_BITS.BIT5
#define PORTA6 PORTA_.PORTA_BITS.BIT6
#define PORTA7 PORTA_.PORTA_BITS.BIT7

__DECL__6812DP256_H__ volatile   union {                  
  struct {          
    unsigned char _DDRA0:1;
    unsigned char _DDRA1:1;
    unsigned char _DDRA2:1;
    unsigned char _DDRA3:1;
    unsigned char _DDRA4:1;
    unsigned char _DDRA5:1;
    unsigned char _DDRA6:1;
    unsigned char _DDRA7:1;
  } DDRA_BITS;        
  unsigned char DDRA_BYTE;  
}DDRA_  _IO_AT(0x02);              


/* DEFINE REGISTER */        
#define DDRA DDRA_.DDRA_BYTE

/*DEFINE REGISTER BITS*/
#define DDRA0 DDRA_.DDRA_BITS._DDRA0
#define DDRA1 DDRA_.DDRA_BITS._DDRA1
#define DDRA2 DDRA_.DDRA_BITS._DDRA2
#define DDRA3 DDRA_.DDRA_BITS._DDRA3
#define DDRA4 DDRA_.DDRA_BITS._DDRA4
#define DDRA5 DDRA_.DDRA_BITS._DDRA5
#define DDRA6 DDRA_.DDRA_BITS._DDRA6
#define DDRA7 DDRA_.DDRA_BITS._DDRA7

/**************************************************************************************************/
/*                                         DEFINE PORT B                                          */
/**************************************************************************************************/
__DECL__6812DP256_H__ volatile   union {                  
  struct {          
    unsigned char BIT0:1;
    unsigned char BIT1:1;
    unsigned char BIT2:1;
    unsigned char BIT3:1;
    unsigned char BIT4:1;
    unsigned char BIT5:1;
    unsigned char BIT6:1;
    unsigned char BIT7:1;
  } PORTB_BITS;        
  unsigned char PORTB_BYTE;  
}PORTB_  _IO_AT(0x01);  /* port B */

/* DEFINE REGISTER */        
#define PORTB PORTB_.PORTB_BYTE

/*DEFINE REGISTER BITS*/
#define PORTB0 PORTB_.PORTB_BITS.BIT0
#define PORTB1 PORTB_.PORTB_BITS.BIT1
#define PORTB2 PORTB_.PORTB_BITS.BIT2
#define PORTB3 PORTB_.PORTB_BITS.BIT3
#define PORTB4 PORTB_.PORTB_BITS.BIT4
#define PORTB5 PORTB_.PORTB_BITS.BIT5
#define PORTB6 PORTB_.PORTB_BITS.BIT6
#define PORTB7 PORTB_.PORTB_BITS.BIT7


__DECL__6812DP256_H__ volatile   union {                  
  struct {          
    unsigned char _DDRB0:1;
    unsigned char _DDRB1:1;
    unsigned char _DDRB2:1;
    unsigned char _DDRB3:1;
    unsigned char _DDRB4:1;
    unsigned char _DDRB5:1;
    unsigned char _DDRB6:1;
    unsigned char _DDRB7:1;
  } DDRB_BITS;        
  unsigned char DDRB_BYTE;  
}DDRB_  _IO_AT(0x03);              


/* DEFINE REGISTER */        
#define DDRB DDRB_.DDRB_BYTE

/*DEFINE REGISTER BITS*/
#define DDRB0 DDRB_.DDRB_BITS._DDRB0
#define DDRB1 DDRB_.DDRB_BITS._DDRB1
#define DDRB2 DDRB_.DDRB_BITS._DDRB2
#define DDRB3 DDRB_.DDRB_BITS._DDRB3
#define DDRB4 DDRB_.DDRB_BITS._DDRB4
#define DDRB5 DDRB_.DDRB_BITS._DDRB5
#define DDRB6 DDRB_.DDRB_BITS._DDRB6
#define DDRB7 DDRB_.DDRB_BITS._DDRB7

/**************************************************************************************************/
/*                                         DEFINE PORT E                                          */
/**************************************************************************************************/

__DECL__6812DP256_H__ volatile  unsigned char PORTE    _IO_AT(0x08);  /* port E */

/****Data Register E******/           
__DECL__6812DP256_H__ volatile   union {                  
  struct {          
    unsigned char BIT0:1;
    unsigned char BIT1:1;
    unsigned char _DDRE2:1;
    unsigned char _DDRE3:1;
    unsigned char _DDRE4:1;
    unsigned char _DDRE5:1;
    unsigned char _DDRE6:1;
    unsigned char _DDRE7:1;
  } DDRE_BITS;        
  unsigned char DDRE_BYTE;  
}DDRE1  _IO_AT(0x09);              


/* DEFINE REGISTER */        
#define DDRE DDRE1.DDRE_BYTE

/*DEFINE REGISTER BITS*/
#define DDRE2 DDRE1.DDRE_BITS._DDRE2
#define DDRE3 DDRE1.DDRE_BITS._DDRE3
#define DDRE4 DDRE1.DDRE_BITS._DDRE4
#define DDRE5 DDRE1.DDRE_BITS._DDRE5
#define DDRE6 DDRE1.DDRE_BITS._DDRE6
#define DDRE7 DDRE1.DDRE_BITS._DDRE7

/**************************************************************************************************/
/*                               PORT E ASSIGNEMENT REGISTER                                      */
/**************************************************************************************************/
__DECL__6812DP256_H__ volatile  union {                  
  struct {          
    unsigned char BIT0:1;
    unsigned char BIT1:1;
    unsigned char _RDWE:1;
    unsigned char _LSTRE:1;
    unsigned char _NECLK:1;
    unsigned char _PIPOE:1;
    unsigned char BIT6:1;
    unsigned char _NOACCE:1;
  } PEAR_BITS;        
  unsigned char PEAR_BYTE;  
}PEAR1 _IO_AT(0x0a);       

/*DEFINE REGISTER*/
#define PEAR PEAR1.PEAR_BYTE

/*DEFINE REGISTER BITS*/
#define RDWE PEAR1.PEAR_BITS._RDWE
#define LSTRE PEAR1.PEAR_BITS._LSTRE
#define NECKL PEAR1.PEAR_BITS._NECLK
#define PIPOE PEAR1.PEAR_BITS._PIPOE
#define NOACCE PEAR1.PEAR_BITS._NOACCE

/**************************************************************************************************/
/*                                            MODE REGISTER                                       */
/**************************************************************************************************/
__DECL__6812DP256_H__ volatile  union {                  
  struct {          
    unsigned char _EME:1     ;
    unsigned char _EMK:1    ;
    unsigned char BIT2:1  ;
    unsigned char _IVIS:1    ;
    unsigned char BIT4:1    ;
    unsigned char _MODA:1    ;
    unsigned char _MODB:1    ;
    unsigned char _MODC:1   ;
  } MODE_BITS;        
  unsigned char MODE_BYTE;  
}MODE1 _IO_AT(0x0B);       

/*DEFINE REGISTER*/
#define MODE MODE1.MODE_BYTE

/*DEFINE REGISTER BITS*/
#define EME MODE1.MODE_BITS._EME
#define EMK MODE1.MODE_BITS._EMK
#define IVIS MODE1.MODE_BITS._IVIS
#define MODA MODE1.MODE_BITS._MODA
#define MODB MODE1.MODE_BITS._MODB
#define MODC MODE1.MODE_BITS._MODC

/**************************************************************************************************/
/*                               PULL-UP CONTROL REGISTER                                         */
/**************************************************************************************************/
__DECL__6812DP256_H__ volatile  union {                  
  struct {          
    unsigned char _PUPAE:1;
    unsigned char _PUPBE:1;
    unsigned char BIT2:1;
    unsigned char BIT3:1;
    unsigned char _PUPEE:1;
    unsigned char BIT5:1;
    unsigned char BIT6:1;
    unsigned char _PUPKE:1;
  } PUCR_BITS;        
  unsigned char PUCR_BYTE;  
}PUCR1 _IO_AT(0x0C);       

/*DEFINE REGISTER*/
#define PUCR PUCR1.PUCR_BYTE

/*DEFINE REGISTER BITS*/
#define PUPAE PUCR1.PUCR_BITS._PUPAE
#define PUPBE PUCR1.PUCR_BITS._PUPBE
#define PUPEE PUCR1.PUCR_BITS._PUPEE
#define PUPKE PUCR1.PUCR_BITS._PUPKE

/**************************************************************************************************/
/*                               REDUCED DRIVE OF I\O LINES                                       */
/**************************************************************************************************/
__DECL__6812DP256_H__ volatile  union {                  
  struct {          
    unsigned char _RDPA:1;
    unsigned char _RDPB:1;
    unsigned char BIT2:1;
    unsigned char BIT3:1;
    unsigned char _RDPE:1;
    unsigned char BIT5:1;
    unsigned char BIT6:1;
    unsigned char _RDPK:1;
  } RDRIV_BITS;        
  unsigned char RDRIV_BYTE;  
}RDRIV1 _IO_AT(0x0D);       

/*DEFINE REGISTER*/
#define RDRIV RDRIV1.RDRIV_BYTE

/*DEFINE REGISTER BITS*/
#define RDPA RDRIV1.RDRIV_BITS._RDPA
#define RDPB RDRIV1.RDRIV_BITS._RDPB
#define RDPE RDRIV1.RDRIV_BITS._RDPE
#define RDPK RDRIV1.RDRIV_BITS._RDPK

/**************************************************************************************************/