start_up.s

人机界面程序

	
	AREA Init, CODE, READONLY
	
Mode_USR	EQU 0x10
Mode_FIQ	EQU 0x11
Mode_IRQ	EQU 0x12
Mode_SVC	EQU	0x13
Mode_ABT	EQU	0x17
Mode_UNDEF	EQU	0x1B
Mode_SYS	EQU	0x1F
I_Bit		EQU	0x80
F_Bit		EQU	0x40

Len_FIQ_Stack	EQU	0x500
Len_IRQ_Stack	EQU	0x500
Len_ABT_Stack	EQU	0x100
Len_UND_Stack	EQU	0x100
Len_SVC_Stack	EQU	0x400

RAM_Limit	EQU	0x40000		; RAM 256k
IRQ_Stack	EQU RAM_Limit
FIQ_Stack	EQU	IRQ_Stack-Len_IRQ_Stack
ABT_Stack	EQU	FIQ_Stack-Len_FIQ_Stack
UND_Stack	EQU	ABT_Stack-Len_ABT_Stack
SVC_Stack	EQU	UND_Stack-Len_UND_Stack
USR_Stack	EQU	SVC_Stack-Len_SVC_Stack


	EXPORT Reset_Handler
Reset_Handler
	BL		ARMInt_Disable
	MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit ; No interrupts
	LDR     sp, =FIQ_Stack

	MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit ; No interrupts
	LDR     sp, =IRQ_Stack

	MSR     CPSR_c, #Mode_ABT:OR:I_Bit:OR:F_Bit ; No interrupts
	LDR     sp, =ABT_Stack

	MSR     CPSR_c, #Mode_UNDEF:OR:I_Bit:OR:F_Bit ; No interrupts
	LDR     sp, =UND_Stack

	MSR     CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit ; No interrupts
	LDR     sp, =SVC_Stack

;/*******************************************************************************/
;/* Initializing Memory required by C Code run time Environment					*/
;/*******************************************************************************/
	IMPORT  |Image$$ZI$$Base|   			;// Base and limit of area
	IMPORT  |Image$$ZI$$Limit|  			;// to zero initialise

	MOV  R2, #0x0 
	LDR  R0, =|Image$$ZI$$Base|
	LDR  R1, =|Image$$ZI$$Limit|

Do_Clear
	STR  R2, [R0], #0x4
	CMP  R0, R1
	BCC  Do_Clear 

;/*******************************************************************************/
;/* Now Change to User Mode and Setup for the User Mode Stack					*/
;/*******************************************************************************/
;	MSR     CPSR_c, #Mode_USR ; No interrupts
;	LDR     sp, =USR_Stack
                
	IMPORT  main
	B       main
	
	EXPORT	ARMInt_Enable
	EXPORT	ARMInt_Disable
ARMInt_Enable
;	stmdb	sp!,{r0}
	mrs r0,cpsr
	bic r0,r0,#0xc0
	msr cpsr_c,r0
;	ldmia	sp!,{r0}
	mov pc,lr
ARMInt_Disable
;	stmdb	sp!,{r0}
	mrs r0,cpsr
	orr r0,r0,#0xc0
	msr cpsr_c,r0
;	ldmia	sp!,{r0}
	mov pc,lr
	
	END