periph.c

本固件程序用于CYPRESS公司的FX2系列高速USB芯片

	}
    // Handle IN data...
    // is the peripheral interface idle...
    if( GPIFTRIG & 0x80 )
    { 
      
      if( GPIFREADYSTAT & 0x01 )
      { 
        // RDY0=1, LOW AREA DATA IS OK.
	    if (Flag_Of_DataHI == TRUE)
		{
          if( EP68FIFOFLGS & 0x01 )
          { 
          // EP6FF=1, when fifo "full"
          }
          else
          { 
		    cishu++;
           // IOA = 0;
            // EP6FF=0, when fifo "not full", buffer available...
			SYNCDELAY;
            GPIFWFSELECT = 0xE4;         //INITIAL WAVEFORM added at 10.06
		    //DatAddress = DLADDR;
	        //Peripheral_SetAddress( DatAddress );
			 SYNCDELAY;                    // 
             GPIFADRH = 0x00;
             SYNCDELAY;                    // added at 10.06
             GPIFADRL = 0x00; // setup GPIF address 
            // setup GPIF transaction count
            SYNCDELAY;
          //  EP6GPIFTCH = 0x01; 
            EP6GPIFTCH = 0x02;   
            SYNCDELAY;
          //  EP6GPIFTCL = 0x04; 
            EP6GPIFTCL = 0x00; 
          // modify 10.06  
            SYNCDELAY;
          
            // trigger FIFO read transaction(s), using SFR
            // R/W=1, EP[1:0]=FIFO_EpNum for EPx read(s)
            GPIFTRIG = GPIFTRIGRD | GPIF_EP6; 
        
            // NOTE: 512 bytes transfers in ~75usec on 8-bit async bus 
            // NOTE: 64 bytes transfers in ~10usec on 8-bit async bus 
        
            // wait for the transaction to terminate naturally...
            SYNCDELAY;                // 
            while( !( GPIFTRIG & 0x80 ) )
            { 
                // should take <75usec @ 8-bit async.
              ; // poll GPIFTRIG.7, DONE bit...
            }
        
           // AUTOIN=0, so 8051 pass pkt. to host...
            SYNCDELAY;              // 
            INPKTEND = 0x06;        // w/skip=0;.commit however many bytes in pkt.
            SYNCDELAY;              // 
                                  // ...NOTE: this also handles "shortpkt"
			Flag_Of_DataHI = FALSE;

          }
		}
      }
      else      
      {   
        //RDY0=0:HIGH AREA DATA IS OK. 
	    if (Flag_Of_DataHI == FALSE)
		{
          if( EP68FIFOFLGS & 0x01 )
          { 
          // EP6FF=1, when fifo "full"

          }
          else
          { 
		    cishu++;
           // IOA = 0;
            // EP6FF=0, when fifo "not full", buffer available...
			SYNCDELAY;
            GPIFWFSELECT = 0xC6;         //EXCHANG FIFOREAD  added at 10.06
           
		    //DatAddress = DHADDR;
	        //Peripheral_SetAddress( DatAddress );
			 SYNCDELAY;                    // 
             GPIFADRH = 0x00;
             SYNCDELAY;                    // added at 10.06
             GPIFADRL = 0x00; // setup GPIF address 
            // setup GPIF transaction count
            SYNCDELAY;
           // EP6GPIFTCH = 0;    //260-8=0xFC
            EP6GPIFTCH = 0x02;   //512
            SYNCDELAY;
           // EP6GPIFTCL = 0xFC; 
            EP6GPIFTCL = 0x00; 
           // modify 10.06  
            SYNCDELAY;
          
            // trigger FIFO read transaction(s), using SFR
            // R/W=1, EP[1:0]=FIFO_EpNum for EPx read(s)
            GPIFTRIG = GPIFTRIGRD | GPIF_EP6; 
        
            // NOTE: 512 bytes transfers in ~75usec on 8-bit async bus 
            // NOTE: 64 bytes transfers in ~10usec on 8-bit async bus 
        
            // wait for the transaction to terminate naturally...
            SYNCDELAY;                // 
            while( !( GPIFTRIG & 0x80 ) )
            { 
                // should take <75usec @ 8-bit async.
              ; // poll GPIFTRIG.7, DONE bit...
            }
	//		SYNCDELAY;
     //       GPIFWFSELECT = 0xE4;         //INITIAL WAVEFORM added at 10.06
		/*  // DEAL WITH THE HIGH 8 BYTES
            GPIFWFSELECT = 0xC6;         //EIGHT BYTE READ EXCHANG FIFOREAD
            DatAddress = DHADDR_8;
	        Peripheral_SetAddress( DatAddress );
            // setup GPIF transaction count
            SYNCDELAY;
            EP6GPIFTCH = 0;    
            SYNCDELAY;
            EP6GPIFTCL = 0x08;    
            SYNCDELAY;
          
            // trigger FIFO read transaction(s), using SFR
            // R/W=1, EP[1:0]=FIFO_EpNum for EPx read(s)
            GPIFTRIG = GPIFTRIGRD | GPIF_EP6; 
        
            // wait for the transaction to terminate naturally...
            SYNCDELAY;                // 
            while( !( GPIFTRIG & 0x80 ) )
            { 
                // should take <75usec @ 8-bit async.
              ; // poll GPIFTRIG.7, DONE bit...
            }
            GPIFWFSELECT = 0xE4;         //INITIAL WAVEFORM
         */
         // modify 10.06 
//            EP6FIFOBUF[ 0 ] = REVID; // 
//            SYNCDELAY;
//            EP6BCH = 0x00;
//           SYNCDELAY;
//            EP6BCL = 0x01; // pass src’d buffer on to host

           // AUTOIN=0, so 8051 pass pkt. to host...
            SYNCDELAY;              // 
            INPKTEND = 0x06;        // w/skip=0;.commit however many bytes in pkt.
            SYNCDELAY;              // 
                                  // ...NOTE: this also handles "shortpkt"
			Flag_Of_DataHI = TRUE;

          }
		}
  
      }
    }
//    else
//    { 
      // GPIF busy...
//    }  
//    IOA = 0x01;
}

BOOL TD_Suspend(void)          // Called before the device goes into suspend mode
{
   return(TRUE);
}

BOOL TD_Resume(void)          // Called after the device resumes
{
   return(TRUE);
}

//-----------------------------------------------------------------------------
// Device Request hooks
//   The following hooks are called by the end point 0 device request parser.
//-----------------------------------------------------------------------------

BOOL DR_GetDescriptor(void)
{
   return(TRUE);
}

BOOL DR_SetConfiguration(void)   // Called when a Set Configuration command is received
{
 if( EZUSB_HIGHSPEED( ) )
  { // ...FX2 in high speed mode
    SYNCDELAY;                  // 
    EP6AUTOINLENH = 0x02;       // set core AUTO commit len = 512 bytes
    SYNCDELAY;                  // 
    EP6AUTOINLENL = 0x00;
    SYNCDELAY;                  // 
    enum_pkt_size = 512;        // max. pkt. size = 512 bytes
  }
  else
  { // ...FX2 in full speed mode
    SYNCDELAY;                  // 
    EP6AUTOINLENH = 0x00;       // set core AUTO commit len = 64 bytes
    SYNCDELAY;                  // 
    EP6AUTOINLENL = 0x40;
    SYNCDELAY;                  // 
    enum_pkt_size = 64;         // max. pkt. size = 64 bytes
  }
  Configuration = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetConfiguration(void)   // Called when a Get Configuration command is received
{
   EP0BUF[0] = Configuration;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_SetInterface(void)       // Called when a Set Interface command is received
{
   AlternateSetting = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetInterface(void)       // Called when a Set Interface command is received
{
   EP0BUF[0] = AlternateSetting;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_GetStatus(void)
{
   return(TRUE);
}

BOOL DR_ClearFeature(void)
{
   return(TRUE);
}

BOOL DR_SetFeature(void)
{
   return(TRUE);
}

BOOL DR_VendorCmnd(void)
{
	return( FALSE );              // no error; command handled OK
}

//-----------------------------------------------------------------------------
// USB Interrupt Handlers
//   The following functions are called by the USB interrupt jump table.
//-----------------------------------------------------------------------------

// Setup Data Available Interrupt Handler
void ISR_Sudav(void) interrupt 0
{
   GotSUD = TRUE;            // Set flag
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUDAV;         // Clear SUDAV IRQ
}

// Setup Token Interrupt Handler
void ISR_Sutok(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUTOK;         // Clear SUTOK IRQ
}

void ISR_Sof(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSOF;            // Clear SOF IRQ
}

void ISR_Ures(void) interrupt 0
{
   if ( EZUSB_HIGHSPEED( ) )
   {
      pConfigDscr = pHighSpeedConfigDscr;
      pOtherConfigDscr = pFullSpeedConfigDscr;
   }
   else
   {
      pConfigDscr = pFullSpeedConfigDscr;
      pOtherConfigDscr = pHighSpeedConfigDscr;
   }
   
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmURES;         // Clear URES IRQ
}

void ISR_Susp(void) interrupt 0
{
   Sleep = TRUE;
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUSP;
}

void ISR_Highspeed(void) interrupt 0
{
   if ( EZUSB_HIGHSPEED( ) )
   {
      pConfigDscr = pHighSpeedConfigDscr;
      pOtherConfigDscr = pFullSpeedConfigDscr;
   }
   else
   {
      pConfigDscr = pFullSpeedConfigDscr;
      pOtherConfigDscr = pHighSpeedConfigDscr;
   }

   EZUSB_IRQ_CLEAR();
//   USBIRQ = bmHSGRANT;
   while (USBIRQ & bmHSGRANT)
     USBIRQ = bmHSGRANT; //bmHSGRANT is bit 5 of USBIRQ
}
void ISR_Ep0ack(void) interrupt 0
{
}
void ISR_Stub(void) interrupt 0
{
}
void ISR_Ep0in(void) interrupt 0
{
}
void ISR_Ep0out(void) interrupt 0
{
}
void ISR_Ep1in(void) interrupt 0
{
}
void ISR_Ep1out(void) interrupt 0
{
}
void ISR_Ep2inout(void) interrupt 0
{/*
  Flag_Of_Command = TRUE;
  SYNCDELAY;   
  CmdLength = ( WORD ) EP2BCH << 8;
  SYNCDELAY;
  CmdLength |= ( WORD ) EP2BCL;
//  IOA = 0x00; //PD.7=0
  EZUSB_IRQ_CLEAR();
  EPIRQ |= 0x10;
*/
}
void ISR_Ep4inout(void) interrupt 0
{
}
void ISR_Ep6inout(void) interrupt 0
{
}
void ISR_Ep8inout(void) interrupt 0
{
}
void ISR_Ibn(void) interrupt 0
{
}
void ISR_Ep0pingnak(void) interrupt 0
{
}
void ISR_Ep1pingnak(void) interrupt 0
{
}
void ISR_Ep2pingnak(void) interrupt 0
{/*
  // if we get a PING-NAK interrupt then arm the endpoint
   SYNCDELAY;                    
   EP2BCL = 0;

//   IOA = 0x00; //PD.7=0

   EZUSB_IRQ_CLEAR();
   NAKIRQ = bmEP2PING;
*/
}
void ISR_Ep4pingnak(void) interrupt 0
{
}
void ISR_Ep6pingnak(void) interrupt 0
{
}
void ISR_Ep8pingnak(void) interrupt 0
{
}
void ISR_Errorlimit(void) interrupt 0
{
}
void ISR_Ep2piderror(void) interrupt 0
{
}
void ISR_Ep4piderror(void) interrupt 0
{
}
void ISR_Ep6piderror(void) interrupt 0
{
}
void ISR_Ep8piderror(void) interrupt 0
{
}
void ISR_Ep2pflag(void) interrupt 0
{
}
void ISR_Ep4pflag(void) interrupt 0
{
}
void ISR_Ep6pflag(void) interrupt 0
{
}
void ISR_Ep8pflag(void) interrupt 0
{
}
void ISR_Ep2eflag(void) interrupt 0
{
}
void ISR_Ep4eflag(void) interrupt 0
{
}
void ISR_Ep6eflag(void) interrupt 0
{
}
void ISR_Ep8eflag(void) interrupt 0
{
}
void ISR_Ep2fflag(void) interrupt 0
{
}
void ISR_Ep4fflag(void) interrupt 0
{
}
void ISR_Ep6fflag(void) interrupt 0
{
}
void ISR_Ep8fflag(void) interrupt 0
{
}
void ISR_GpifComplete(void) interrupt 0
{
}
void ISR_GpifWaveform(void) interrupt 0
{
  GPIFABORT = 0xFF;             // abort to handle shortpkt
  
  SYNCDELAY;                    // used here as "delay"
  EXIF &=  ~0x40;
  INT4CLR = 0xFF;               // automatically enabled at POR
  SYNCDELAY;
}