📄 cpu.c
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : bldc_zc_8013
** Processor : 56F8013VFAE
** Beantype : 56F8013VFAE
** Version : Bean 01.003, Driver 01.24, CPU db: 2.87.068
** Datasheet : MC56F8300UM/D - Rev. 1.0
** Compiler : Metrowerks DSP C Compiler
** Date/Time : 23.5.2005, 11:21
** Abstract :
**
** Settings :
**
** Contents :
** GetSpeedMode - byte Cpu_GetSpeedMode(void);
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Freescale Semiconductor
** 2004 All Rights Reserved
**
** (c) Copyright UNIS, spol. s r.o. 1997-2004
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Cpu. */
#include "QTIMER_0.h"
#include "QTIMER_1.h"
#include "QTIMER_2.h"
#include "QTIMER_3.h"
#include "ADC_A.h"
#include "PWM_A.h"
#include "MC1.h"
#include "PC_M1.h"
#include "Inhr1.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Cpu.h"
/* Global variables */
volatile word SR_lock=0; /* Lock */
volatile word SR_reg; /* Current value of the SR register */
/*
** ===================================================================
** Method : Cpu_Interrupt (bean 56F8013VFAE)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma interrupt alignsp
void Cpu_Interrupt(void)
{
asm(DEBUGHLT); /* Halt the core and placing it in the debug processing state */
}
/*
** ===================================================================
** Method : Cpu_DisableInt (bean 56F8013VFAE)
**
** Description :
** Disables all maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_EnableInt (bean 56F8013VFAE)
**
** Description :
** Enables all maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetStopMode (bean 56F8013VFAE)
**
** Description :
** Sets low power mode - Stop mode.
** For more information about the stop mode see this CPU
** documentation.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetWaitMode (bean 56F8013VFAE)
**
** Description :
** Sets low power mode - Wait mode.
** For more information about the wait mode see this CPU
** documentation.
** Release from wait mode: Reset or interrupt
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_GetSpeedMode (bean 56F8013VFAE)
**
** Description :
** Gets current speed mode
** Parameters : None
** Returns :
** --- - Speed mode (HIGH_SPEED, LOW_SPEED,
** SLOW_SPEED)
** ===================================================================
*/
byte Cpu_GetSpeedMode(void)
{
return HIGH_SPEED; /* Result the actual cpu mode - high speed mode*/
}
/*
** ===================================================================
** Method : _EntryPoint (bean 56F8013VFAE)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
extern void init_56800_(void); /* Forward declaration of external startup function declared in startup file */
/*** !!! Here you can place your own code using property "User data declarations" on the build options tab. !!! ***/
void _EntryPoint(void)
{
/*** !!! Here you can place your own code before PE initialization using property "User code before PE initialization" on the build options tab. !!! ***/
/*** ### 56F8013VFAE "Cpu" init code ... ***/
/*** PE initialization code after reset ***/
/* System clock initialization */
setRegBitGroup(OSCTL,TRIM,(word)getReg(FMOPT1)); /* Set the trim osc freq with factory programmed value */
setRegBitVal(PLLCR,PRECS,C_Cpu_reg_PLLCR_bit_PRECS); /* Select an internal clock source for the CPU core */
setReg(PLLCR,(PLLCR_LCKON_MASK | PLLCR_ZSRC0_MASK)); /* Enable PLL, LCKON and select clock source from prescaler */
/* PLLDB: LORTP=2,??=0,PLLCOD=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
setReg16(PLLDB,C_Cpu_reg_PLLDB); /* Set the clock prescalers */
while(!getRegBit(PLLSR, LCK0)){} /* Wait for PLL lock */
setReg(PLLCR,(PLLCR_LCKON_MASK | PLLCR_ZSRC1_MASK)); /* Select clock source from postscaler */
/* FMCLKD: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DIVLD=0,PRDIV8=0,DIV=0x28 */
setReg16(FMCLKD,C_Cpu_reg_FMCLKD); /* Set the flash clock prescaler */
/*** End of PE initialization code after reset ***/
/*** !!! Here you can place your own code after PE initialization using property "User code after PE initialization" on the build options tab. !!! ***/
asm(JMP init_56800_); /* Jump to C startup code */
}
/*
** ===================================================================
** Method : PE_low_level_init (bean 56F8013VFAE)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void PE_low_level_init(void)
{
/* GPIO_A_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
setReg16(GPIO_A_DRIVE,C_Cpu_reg_GPIO_A_DRIVE); /* Set High/Low drive strength on GPIOA pins according to the CPU bean settings */
/* GPIO_B_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
setReg16(GPIO_B_DRIVE,C_Cpu_reg_GPIO_B_DRIVE); /* Set High/Low drive strength on GPIOB pins according to the CPU bean settings */
/* GPIO_C_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE6=0,DRIVE5=0,DRIVE4=0,??=0,DRIVE2=0,DRIVE1=0,DRIVE0=0 */
setReg16(GPIO_C_DRIVE,C_Cpu_reg_GPIO_C_DRIVE); /* Set High/Low drive strength on GPIOC pins according to the CPU bean settings */
/* GPIO_D_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
setReg16(GPIO_D_DRIVE,C_Cpu_reg_GPIO_D_DRIVE); /* Set High/Low drive strength on GPIOD pins according to the CPU bean settings */
/* SIM_GPS: TCR=0,PCR=0 */
clrReg16Bits(SIM_GPS,C_Cpu_reg_SIM_GPS_mask_and); /* Set the TMR and PWM module clock rates */
/* SIM_PCE: I2C=0,??=0,ADC=1,??=0,??=0,??=0,??=0,??=0,??=0,TMR=1,??=0,SCI=1,??=0,SPI=0,??=0,PWM=1 */
setReg16(SIM_PCE,C_Cpu_reg_SIM_PCE); /* Set up the peripheral clock enable register */
/* SIM_CONTROL: TC3_SD=0,TC2_SD=0,TC1_SD=0,TC0_SD=0,SCI_SD=0,??=0,TC3_INP=0,??=0,??=0,??=0,OnceEbl=1,SWRst=0,stop_disable=0,wait_disable=0 */
setReg16(SIM_CONTROL,C_Cpu_reg_SIM_CONTROL); /* Set up the SIM control register */
/* Common initialization of the CPU registers */
/* INTC_IPR3: ADCA_CC_IPL=3,TMR_2_IPL=2,TMR_1_IPL=1,TMR_0_IPL=2 */
clrSetReg16Bits(INTC_IPR3,C_Cpu_reg_INTC_IPR3_mask_and,C_Cpu_reg_INTC_IPR3_mask_or);
/* INTC_IPR4: PWM_F_IPL=2,PWM_RL_IPL=2,ADC_ZC_IPL=2 */
clrSetReg16Bits(INTC_IPR4,C_Cpu_reg_INTC_IPR4_mask_and,C_Cpu_reg_INTC_IPR4_mask_or);
/* GPIO_C_PER: PE6=1,PE5=1,PE4=1,PE2=1,PE1=1,PE0=1 */
setReg16Bits(GPIO_C_PER,C_Cpu_reg_GPIO_C_PER_mask_or);
/* GPIO_A_PER: PE|=0x3F */
setReg16Bits(GPIO_A_PER,C_Cpu_reg_GPIO_A_PER_mask_or);
/* SIM_GPS: CFG_B7=0,CFG_B6=0 */
clrReg16Bits(SIM_GPS,C_Cpu_reg_SIM_GPS_mask_and_0);
/* GPIO_B_PER: PE|=0xC0 */
setReg16Bits(GPIO_B_PER,C_Cpu_reg_GPIO_B_PER_mask_or);
/* INTC_IPR2: SCI_RCV_IPL=2,SCI_RERR_IPL=2,SCI_TIDL_IPL=2,SCI_XMIT_IPL=2 */
clrSetReg16Bits(INTC_IPR2,C_Cpu_reg_INTC_IPR2_mask_and,C_Cpu_reg_INTC_IPR2_mask_or);
/* ### Init_TMR "QTIMER_0" init code ... */
/* ### Call "QTIMER_0_Init();" init method in a user code, i.e. in the main code */
/* ### Note: To enable automatic calling of the "QTIMER_0" init code here must be
set the property 'Call init method' to 'yes'
*/
/* ### Init_TMR "QTIMER_1" init code ... */
QTIMER_1_Init();
/* ### Init_TMR "QTIMER_2" init code ... */
/* ### Call "QTIMER_2_Init();" init method in a user code, i.e. in the main code */
/* ### Note: To enable automatic calling of the "QTIMER_2" init code here must be
set the property 'Call init method' to 'yes'
*/
/* ### Init_TMR "QTIMER_3" init code ... */
QTIMER_3_Init();
/* ### Init_ADC "ADC_A" init code ... */
/* ### Call "ADC_A_Init();" init method in a user code, i.e. in the main code */
/* ### Note: To enable automatic calling of the "ADC_A" init code here must be
set the property 'Call init method' to 'yes'
*/
/* ### Init_PWM "PWM_A" init code ... */
/* ### Call "PWM_A_Init();" init method in a user code, i.e. in the main code */
/* ### Note: To enable automatic calling of the "PWM_A" init code here must be
set the property 'Call init method' to 'yes'
*/
/* ### Asynchro serial "Inhr1" init code ... */
Inhr1_Init();
/* ### PC_Master "PC_M1" init code ... */
PC_M1_PE_Init();
__EI(0); /* Enable interrupts of the selected priority level */
}
/* END Cpu. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 2.96 [03.65]
** for the Freescale 56800 series of microcontrollers.
**
** ###################################################################
*/
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