bldc_zc_8013_setings.xml

菲斯卡尔无传感器无刷控制方案。具体说明文档和程序都在压缩包内。

<PE_PROJECT_SETTINGS_DOCUMENTATION>
<PE_product_version v="version 2.95 for Freescale 56800&#47;E family"/>
<PE_core_version v="Processor Expert Version 0358"/>

<CPU_Bean name="Cpu" type="56F8013">
<Enabled v="Y"/>

<Properties>
<Bean_name v="Cpu"/>
<CPU_type v="56F8013"/>
<Oscillator_frequency__MHz_ v="8"/>
<Clock_source v="On-chip relaxation oscillator"/>
<Initialization_priority v="minimal priority"/>
<Saturation_mode v="Disabled"/>

<boolgroup name="Initialize shadow registers" value="no" />

<group name="Internal peripherals">

<group name="SIM module">
<TMR_channel_3_in_stop_mode v="Disabled"/>
<TMR_channel_2_in_stop_mode v="Disabled"/>
<TMR_channel_1_in_stop_mode v="Disabled"/>
<TMR_channel_0_in_stop_mode v="Disabled"/>
<SCI_in_stop_mode v="Disabled"/>
<Wait_disable_mode v="Enabled"/>
<Stop_disable_mode v="Enabled"/>
<OnCE_clock_to_core v="Enabled when core TAP is enabled"/>
<CLKO_select v="test-Continuous system clock"/>
<CLKOUT_mode v="Tristated"/>

</group>

<boolgroup name="Flash security &#38; protection" value="Disabled" />

<group name="Peripheral clocks">
<PWM_peripheral_clock v="Enabled"/>
<SPI_peripheral_clock v="Disabled"/>
<SCI_peripheral_clock v="Enabled"/>
<TMR_peripheral_clock v="Enabled"/>
<ADC_peripheral_clock v="Enabled"/>
<I2C_peripheral_clock v="Disabled"/>

</group>

<group name="I&#47;O module">

<group name="GPIOA">
<Drive_strength_for_GPIOA0 v="Low"/>
<Drive_strength_for_GPIOA1 v="Low"/>
<Drive_strength_for_GPIOA2 v="Low"/>
<Drive_strength_for_GPIOA3 v="Low"/>
<Drive_strength_for_GPIOA4 v="Low"/>
<Drive_strength_for_GPIOA5 v="Low"/>
<Drive_strength_for_GPIOA6 v="Low"/>
<Drive_strength_for_GPIOA7 v="Low"/>

</group>

<group name="GPIOB">
<Drive_strength_for_GPIOB0 v="Low"/>
<Drive_strength_for_GPIOB1 v="Low"/>
<Drive_strength_for_GPIOB2 v="Low"/>
<Drive_strength_for_GPIOB3 v="Low"/>
<Drive_strength_for_GPIOB4 v="Low"/>
<Drive_strength_for_GPIOB5 v="Low"/>
<Drive_strength_for_GPIOB6 v="Low"/>
<Drive_strength_for_GPIOB7 v="Low"/>

</group>

<group name="GPIOC">
<Drive_strength_for_GPIOC0 v="Low"/>
<Drive_strength_for_GPIOC1 v="Low"/>
<Drive_strength_for_GPIOC2 v="Low"/>
<Drive_strength_for_GPIOC4 v="Low"/>
<Drive_strength_for_GPIOC5 v="Low"/>
<Drive_strength_for_GPIOC6 v="Low"/>

</group>

<group name="GPIOD">
<Drive_strength_for_GPIOD0 v="Low"/>
<Drive_strength_for_GPIOD1 v="Low"/>
<Drive_strength_for_GPIOD2 v="Low"/>
<Drive_strength_for_GPIOD3 v="Low"/>

</group>

</group>

</group>

<group name="Enabled speed modes">

<boolgroup name="High speed mode" value="Enabled">
<System_clock__IP_Bus_ v="32"/>

<boolgroup name="PLL clock" value="Enabled">
<PLL_clock_frequency v="192"/>

</boolgroup>

</boolgroup>

<boolgroup name="Low speed mode" value="Disabled" />

<boolgroup name="Slow speed mode" value="Disabled" />

</group>
</Properties>

<Methods>
<SetHighSpeed v="don't generate code"/>
<SetLowSpeed v="don't generate code"/>
<SetSlowSpeed v="don't generate code"/>
<GetSpeedMode v="generate code"/>
<EnableInt v="generate code"/>
<DisableInt v="generate code"/>
<GetResetSource v="don't generate code"/>
<SetWaitMode v="generate code"/>
<SetStopMode v="generate code"/>
<GetBusFreqHz v="don't generate code"/>
<OpenBackDoor v="don't generate code"/>
<InitShadowRegs v="don't generate code"/>
</Methods>

<Events>
<Event_module_name v="Events"/>

<event name="OnReset" value="don't generate code" />

<event name="OnSwINT0" value="don't generate code" />

<event name="OnSwINT1" value="don't generate code" />

<event name="OnSwINT2" value="don't generate code" />

<event name="OnSwINT3" value="don't generate code" />

<event name="OnSwINTLP" value="don't generate code" />

<event name="OnPLLError" value="don't generate code" />

<event name="OnIllegalOpcode" value="don't generate code" />

<event name="OnMisalignData" value="don't generate code" />

<event name="OnHWStackError" value="don't generate code" />
</Events>
<Compiler v="Metrowerks DSP C Compiler"/>

<CompilerProperties>
<Compiler v="Metrowerks DSP C Compiler"/>
<PESL_support v="yes"/>
<Unhandled_interrupts v="One handler for all"/>

<group name="User initialization">
<User_data_declarations v="(string list)"/>
<User_code_before_PE_initialization v="(string list)"/>
<User_code_after_PE_initialization v="(string list)"/>

</group>

<boolgroup name="Generate linker file" value="yes">
<pROM_xRAM_mode v="yes"/>

<boolgroup name="Serial bootloader support" value="no" />
<Stack_size v="512"/>
<Heap_size v="256"/>

<list name="ROM&#47;RAM Areas">

<group name="MemoryArea0">

<boolgroup name="ROM&#47;RAM Area" value="Enabled">
<Name v=".p_Interrupts"/>
<Address v="0"/>
<Size v="92"/>
<Qualifier v="RWX"/>

</boolgroup>

</group>

<group name="MemoryArea1">

<boolgroup name="ROM&#47;RAM Area" value="Enabled">
<Name v=".p_Code"/>
<Address v="92"/>
<Size v="8100"/>
<Qualifier v="RWX"/>

</boolgroup>

</group>

<group name="MemoryArea2">

<boolgroup name="ROM&#47;RAM Area" value="Enabled">
<Name v=".x_Data"/>
<Address v="1"/>
<Size v="2047"/>
<Qualifier v="RW"/>

</boolgroup>

</group>

</list>

</boolgroup>
</CompilerProperties>
</CPU_Bean>

<Bean name="QTIMER_0" type="Init_TMR">
<Enabled v="Y"/>

<Properties>
<Bean_name v="QTIMER_0"/>
<Device v="TMR0"/>

<group name="Settings">

<group name="Clock settings">

<group name="Primary source">
<Primary_source v="prescaler (IP BUS clock &#47; 32)"/>

</group>

<group name="Secondary source">
<Secondary_source v="counter 0 input pin"/>

</group>

</group>
<Operation_mode v="Count mode"/>
<Count_once v="count repeatedly"/>
<Count_length v="roll-over"/>
<Count_direction v="up"/>
<Master_mode v="Disabled"/>
<External_OFLAG_force v="Disabled"/>
<Forced_OFLAG_value v="Disabled"/>
<Force_OFLAG_output v="Disabled"/>
<Output_enable v="no"/>
<Output_polarity v="true"/>
<Input_polarity v="true"/>
<Co_channel_initialization v="Disabled"/>

<boolgroup name="Input capture mode" value="Disabled" />
<OutputMode v="asserted while counter is active"/>

<boolgroup name="Compare load control 1" value="Disabled" />

<boolgroup name="Compare load control 2" value="Disabled" />

</group>

<list name="Pins...">

</list>

<group name="Interrupts">

<group name="Timer Channel">
<Interrupt v="INT_TMR0"/>
<Timer_compare_interrupt v="Disabled"/>
<Timer_overflow_interrupt v="Disabled"/>
<Input_edge_interrupt v="Disabled"/>
<Timer_compare_1_interrupt v="Disabled"/>
<Timer_compare_2_interrupt v="Disabled"/>
<Interrupt_priority v="medium priority"/>
<ISR_name v="IsrCommutation"/>

</group>

</group>

<group name="Initialization">
<Call_Init_in_CPU_init__code v="no"/>

<group name="Register values">
<Timer_Compare_register_1 v="0"/>
<Timer_Compare_register_2 v="0"/>
<Timer_Load_register v="0"/>
<Timer_Counter_register v="0"/>
<Timer_Comparator_Load_register_1 v="0"/>
<Timer_Comparator_Load_register_2 v="0"/>

</group>

</group>
</Properties>

<Methods>
<Init v="generate code"/>
</Methods>

<Events>
</Events>
</Bean>

<Bean name="QTIMER_1" type="Init_TMR">
<Enabled v="Y"/>

<Properties>
<Bean_name v="QTIMER_1"/>
<Device v="TMR1"/>

<group name="Settings">

<group name="Clock settings">

<group name="Primary source">
<Primary_source v="prescaler (IP BUS clock)"/>

</group>

<group name="Secondary source">
<Secondary_source v="counter 0 input pin"/>

</group>

</group>
<Operation_mode v="Count mode"/>
<Count_once v="count repeatedly"/>
<Count_length v="count till compare, then reinitialize"/>
<Count_direction v="up"/>
<Master_mode v="Disabled"/>
<External_OFLAG_force v="Disabled"/>
<Forced_OFLAG_value v="Disabled"/>
<Force_OFLAG_output v="Disabled"/>
<Output_enable v="no"/>
<Output_polarity v="true"/>
<Input_polarity v="true"/>
<Co_channel_initialization v="Disabled"/>

<boolgroup name="Input capture mode" value="Disabled" />
<OutputMode v="asserted while counter is active"/>

<boolgroup name="Compare load control 1" value="Disabled" />

<boolgroup name="Compare load control 2" value="Disabled" />

</group>

<list name="Pins...">

</list>

<group name="Interrupts">

<group name="Timer Channel">
<Interrupt v="INT_TMR1"/>
<Timer_compare_interrupt v="Enabled"/>
<Timer_overflow_interrupt v="Disabled"/>
<Input_edge_interrupt v="Disabled"/>
<Timer_compare_1_interrupt v="Disabled"/>
<Timer_compare_2_interrupt v="Disabled"/>
<Interrupt_priority v="minimal priority"/>
<ISR_name v="IsrQTRecorder"/>

</group>

</group>

<group name="Initialization">
<Call_Init_in_CPU_init__code v="yes"/>

<group name="Register values">
<Timer_Compare_register_1 v="1600"/>
<Timer_Compare_register_2 v="0"/>
<Timer_Load_register v="0"/>
<Timer_Counter_register v="0"/>
<Timer_Comparator_Load_register_1 v="0"/>
<Timer_Comparator_Load_register_2 v="0"/>

</group>

</group>
</Properties>

<Methods>
<Init v="generate code"/>
</Methods>

<Events>
</Events>
</Bean>

<Bean name="QTIMER_2" type="Init_TMR">
<Enabled v="Y"/>

<Properties>
<Bean_name v="QTIMER_2"/>
<Device v="TMR2"/>

<group name="Settings">

<group name="Clock settings">

<group name="Primary source">
<Primary_source v="prescaler (IP BUS clock)"/>

</group>

<group name="Secondary source">
<Secondary_source v="counter 2 input pin"/>

</group>

</group>
<Operation_mode v="Count mode"/>
<Count_once v="count repeatedly"/>
<Count_length v="count till compare, then reinitialize"/>
<Count_direction v="up"/>
<Master_mode v="Disabled"/>
<External_OFLAG_force v="Disabled"/>
<Forced_OFLAG_value v="Disabled"/>
<Force_OFLAG_output v="Disabled"/>
<Output_enable v="no"/>
<Output_polarity v="true"/>
<Input_polarity v="true"/>
<Co_channel_initialization v="Disabled"/>

<boolgroup name="Input capture mode" value="Disabled" />
<OutputMode v="asserted while counter is active"/>

<boolgroup name="Compare load control 1" value="Disabled" />

<boolgroup name="Compare load control 2" value="Disabled" />

</group>

<list name="Pins...">

</list>

<group name="Interrupts">

<group name="Timer Channel">
<Interrupt v="INT_TMR2"/>
<Timer_compare_interrupt v="Enabled"/>
<Timer_overflow_interrupt v="Disabled"/>
<Input_edge_interrupt v="Disabled"/>
<Timer_compare_1_interrupt v="Disabled"/>
<Timer_compare_2_interrupt v="Disabled"/>
<Interrupt_priority v="1"/>
<ISR_name v="IsrSpeedCurrentControl"/>

</group>

</group>

<group name="Initialization">
<Call_Init_in_CPU_init__code v="no"/>

<group name="Register values">
<Timer_Compare_register_1 v="6400"/>
<Timer_Compare_register_2 v="0"/>
<Timer_Load_register v="0"/>
<Timer_Counter_register v="0"/>
<Timer_Comparator_Load_register_1 v="0"/>
<Timer_Comparator_Load_register_2 v="0"/>

</group>

</group>
</Properties>

<Methods>
<Init v="generate code"/>
</Methods>

<Events>
</Events>
</Bean>

<Bean name="QTIMER_3" type="Init_TMR">
<Enabled v="Y"/>

<Properties>
<Bean_name v="QTIMER_3"/>
<Device v="TMR3"/>

<group name="Settings">

<group name="Clock settings">

<group name="Primary source">
<Primary_source v="prescaler (IP BUS clock)"/>

</group>

<group name="Secondary source">
<Secondary_source v="counter 3 input pin"/>

</group>

</group>
<Operation_mode v="Triggered count mode"/>
<Count_once v="count repeatedly"/>
<Count_length v="count till compare, then reinitialize"/>
<Count_direction v="down"/>
<Master_mode v="Disabled"/>
<External_OFLAG_force v="Disabled"/>
<Forced_OFLAG_value v="Disabled"/>
<Force_OFLAG_output v="Disabled"/>
<Output_enable v="no"/>
<Output_polarity v="true"/>
<Input_polarity v="true"/>
<Co_channel_initialization v="Disabled"/>

<boolgroup name="Input capture mode" value="Disabled" />
<OutputMode v="set on compare, cleared on secondary source input edge"/>

<boolgroup name="Compare load control 1" value="Disabled" />

<boolgroup name="Compare load control 2" value="Disabled" />

</group>

<list name="Pins...">

</list>

<group name="Interrupts">

<group name="Timer Channel">
<Interrupt v="INT_TMR3"/>
<Timer_compare_interrupt v="Disabled"/>
<Timer_overflow_interrupt v="Disabled"/>
<Input_edge_interrupt v="Disabled"/>
<Timer_compare_1_interrupt v="Disabled"/>
<Timer_compare_2_interrupt v="Disabled"/>
<Interrupt_priority v="medium priority"/>
<ISR_name v=""/>

</group>

</group>

<group name="Initialization">
<Call_Init_in_CPU_init__code v="yes"/>

<group name="Register values">
<Timer_Compare_register_1 v="0"/>
<Timer_Compare_register_2 v="0"/>
<Timer_Load_register v="400"/>
<Timer_Counter_register v="400"/>
<Timer_Comparator_Load_register_1 v="0"/>
<Timer_Comparator_Load_register_2 v="0"/>

</group>

</group>
</Properties>

<Methods>
<Init v="generate code"/>
</Methods>

<Events>
</Events>
</Bean>

<Bean name="ADC_A" type="Init_ADC">
<Enabled v="Y"/>

<Properties>
<Bean_name v="ADC_A"/>
<Device v="ADC"/>

<group name="Settings">

<group name="Clock setting">
<Clock_divisor_select_value v="8"/>
<A_D_Frequency v="2 MHz"/>

</group>
<Stop_mode__0_ v="no"/>
<Stop_mode_1 v="no"/>
<ADC_mode v="Triggered Parallel"/>

<enumgroup name="Parallel mode" value="simultaneous">

</enumgroup>
<Trigger_mode__0_ v="SYNC input or START bit"/>
<Trigger_mode_1 v="SYNC input or START bit"/>
<Power_saving_mode v="Disabled"/>
<Power_up_delay v="13"/>
<Auto_standby v="Disabled"/>

<boolgroup name="Calibrate ADC 0 mode" value="normal" />

<boolgroup name="Calibrate ADC 1 mode" value="normal" />

<boolgroup name="High volt. ref. source" value="internal" />

<boolgroup name="Low volt. ref. source" value="internal" />

<group name="A&#47;D Channels">

<group name="Channels configuration">
<AN0_AN1 v="Single ended mode"/>
<AN2_AN3 v="Single ended mode"/>
<AN4_AN5 v="Single ended mode"/>
<AN6_AN7 v="Single ended mode"/>