📄 cpu.c
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : touchpanal
** Processor : MC9S08QG8CDT
** Beantype : MC9S08QG8_16
** Version : Bean 01.250, Driver 01.27, CPU db: 2.87.115
** Datasheet : MC9S08QG8 Rev. 2 6/2006
** Compiler : CodeWarrior HCS08 C Compiler
** Date/Time : 2007-10-11, 12:42
** Abstract :
** This bean "MC9S08QG8_16" contains initialization of the
** CPU and provides basic methods and events for CPU core
** settings.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** Delay100US - void Cpu_Delay100US(word us100);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2006
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Cpu. */
#pragma MESSAGE DISABLE C4002 /* WARNING C4002: Result not used is ignored */
#include "AS1.h"
#include "TI1.h"
#include "KBI1.h"
#include "SM1.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Events.h"
#include "Cpu.h"
/* Global variables */
volatile byte CCR_reg; /* Current CCR register */
/*
** ===================================================================
** Method : Cpu_Interrupt (bean MC9S08QG8_16)
**
** Description :
** The method services unhandled interrupt vectors.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
ISR(Cpu_Interrupt)
{
}
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S08QG8_16)
**
** Description :
** Disables maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S08QG8_16)
**
** Description :
** Enables maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_Delay100US (bean MC9S08QG8_16)
**
** Description :
** This method realizes software delay. The length of delay
** is at least 100 microsecond multiply input parameter
** [us100]. As the delay implementation is not based on real
** clock, the delay time may be increased by interrupt
** service routines processed during the delay. The method
** is independent on selected speed mode.
** Parameters :
** NAME - DESCRIPTION
** us100 - Number of 100 us delay repetitions.
** Returns : Nothing
** ===================================================================
*/
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma MESSAGE DISABLE C5703
void Cpu_Delay100US(word us100)
{
/* Total irremovable overhead: 16 cycles */
/* ldhx: 5 cycles overhead (load parameter into register) */
/* jsr: 5 cycles overhead (jump to subroutine) */
/* rts: 6 cycles overhead (return from subroutine) */
asm {
loop:
/* 100 us delay block begin */
/*
* Delay
* - requested : 100 us @ 4.1856MHz,
* - possible : 419 c, 100105.12 ns, delta 105.12 ns
* - without removable overhead : 403 c, 96282.49 ns
*/
pshh /* (2 c: 477.83 ns) backup H */
pshx /* (2 c: 477.83 ns) backup X */
ldhx #0x30 /* (3 c: 716.74 ns) number of iterations */
label0:
aix #-0x01 /* (2 c: 477.83 ns) decrement H:X */
cphx #0x00 /* (3 c: 716.74 ns) compare it to zero */
bne label0 /* (3 c: 716.74 ns) repeat 48x */
pulx /* (3 c: 716.74 ns) restore X */
pulh /* (3 c: 716.74 ns) restore H */
nop /* (1 c: 238.91 ns) wait for 1 c */
nop /* (1 c: 238.91 ns) wait for 1 c */
nop /* (1 c: 238.91 ns) wait for 1 c */
nop /* (1 c: 238.91 ns) wait for 1 c */
nop /* (1 c: 238.91 ns) wait for 1 c */
nop /* (1 c: 238.91 ns) wait for 1 c */
/* 100 us delay block end */
aix #-0x01 /* us100 parameter is passed via H:X registers */
cphx #0x00
bne loop /* next loop */
rts /* return from subroutine */
}
}
/*
** ===================================================================
** Method : _EntryPoint (bean MC9S08QG8_16)
**
** Description :
** Initializes the whole system like timing and so on. At the end
** of this function, the C startup is invoked to initialize stack,
** memory areas and so on.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
extern void _Startup(void); /* Forward declaration of external startup function declared in file Start12.c */
#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
/* ### MC9S08QG8_16 "Cpu" init code ... */
/* PE initialization code after reset */
/* Common initialization of the write once registers */
/* SOPT1: COPE=0,COPT=1,STOPE=0,??=1,??=0,??=0,BKGDPE=1,RSTPE=1 */
setReg8(SOPT1, 0x53);
/* SPMSC1: LVDF=0,LVDACK=0,LVDIE=0,LVDRE=1,LVDSE=1,LVDE=1,??=0,BGBE=0 */
setReg8(SPMSC1, 0x1C);
/* SPMSC2: ??=0,??=0,??=0,PDF=0,PPDF=0,PPDACK=0,PDC=0,PPDC=0 */
setReg8(SPMSC2, 0x00);
/* SPMSC3: LVDV=0,LVWV=0 */
clrReg8Bits(SPMSC3, 0x30);
/* System clock initialization */
ICSTRM = *(unsigned char*far)0xFFAF; /* Initialize ICSTRM register from a non volatile memory */
ICSSC = *(unsigned char*far)0xFFAE; /* Initialize ICSSC register from a non volatile memory */
/* ICSC1: CLKS=0,RDIV=0,IREFS=1,IRCLKEN=0,IREFSTEN=0 */
setReg8(ICSC1, 0x04); /* Initialization of the ICS control register 1 */
/* ICSC2: BDIV=1,RANGE=0,HGO=0,LP=0,EREFS=0,ERCLKEN=0,EREFSTEN=0 */
setReg8(ICSC2, 0x40); /* Initialization of the ICS control register 2 */
/*** End of PE initialization code after reset ***/
__asm jmp _Startup ; /* Jump to C startup code */
}
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S08QG8_16)
**
** Description :
** Initializes beans and provides common register initialization.
** The method is called automatically as a part of the
** application initialization code.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PE_low_level_init(void)
{
/* Common initialization of the CPU registers */
/* PTBD: PTBD2=0,PTBD1=1 */
clrSetReg8Bits(PTBD, 0x04, 0x02);
/* PTBDD: PTBDD4=0,PTBDD3=0,PTBDD2=1,PTBDD1=1,PTBDD0=0 */
clrSetReg8Bits(PTBDD, 0x19, 0x06);
/* PTAPE: PTAPE2=1 */
setReg8Bits(PTAPE, 0x04);
/* PTASE: PTASE4=1,PTASE3=1,PTASE2=1,PTASE1=1,PTASE0=1 */
setReg8Bits(PTASE, 0x1F);
/* PTBSE: PTBSE7=1,PTBSE6=1,PTBSE5=1,PTBSE4=1,PTBSE3=1,PTBSE2=1,PTBSE1=1,PTBSE0=1 */
setReg8(PTBSE, 0xFF);
/* PTADS: ??=0,??=0,PTADS5=0,PTADS4=0,PTADS3=0,PTADS2=0,PTADS1=0,PTADS0=0 */
setReg8(PTADS, 0x00);
/* PTBDS: PTBDS7=0,PTBDS6=0,PTBDS5=0,PTBDS4=0,PTBDS3=0,PTBDS2=0,PTBDS1=0,PTBDS0=0 */
setReg8(PTBDS, 0x00);
/* ### Shared modules init code ... */
/* ### Asynchro serial "AS1" init code ... */
AS1_Init();
/* ### TimerInt "TI1" init code ... */
TI1_Init();
/* ### Init_KBI "KBI1" init code ... */
/* ### Call "KBI1_Init();" init method in a user code, i.e. in the main code */
/* ### Note: To enable automatic calling of the "KBI1" init code here must be
set the property Call Init method to 'yes'
*/
/* ### Synchro master "SM1" init code ... */
SM1_Init();
__EI(); /* Enable interrupts */
}
/* Initialization of the CPU registers in FLASH */
/* NVPROT: FPS=0x7F,FPDIS=1 */
const unsigned char NVPROT_INIT @0x0000FFBD = 0xFF;
/* NVOPT: KEYEN=0,FNORED=1,??=1,??=1,??=1,??=1,SEC01=1,SEC00=0 */
const unsigned char NVOPT_INIT @0x0000FFBF = 0x7E;
/* END Cpu. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 3.00 [03.89]
** for the Freescale HCS08 series of microcontrollers.
**
** ###################################################################
*/
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