📄 cap.c
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#include "C240.h"
/* define constant value */
#define VELOCITY_CONST 6250000
/* define variable */
int display_times; /* accumulation for display */
int T3overflow_counter; /* T3 overflow times */
int sign_state=0;
unsigned int velocity_value;
unsigned int velocity_dotbit;
/* define Input/Output variable value */
ioport unsigned int port0,port1,port2,port3,port4;
/* define structure type and variable value */
struct CAP_INT
{
unsigned int PA_value;
unsigned int CAP_value;
long delta_count;
struct CAP_INT * next;
};
struct CAP_INT * CAP_p;
/*********************************************/
/* Creat circle linkage table */
struct CAP_INT * creat_link()
{
int i;
struct CAP_INT * h,* p; /* pointer h point to virtual value */
h=(struct CAP_INT *)malloc(sizeof(struct CAP_INT));
h->next=h;
for(i=1;i<=6;i++)
{
p=(struct CAP_INT *)malloc(sizeof(struct CAP_INT));
p->PA_value=0;
p->CAP_value=0;
p->delta_count=0;
p->next=h->next;
h->next=p;
}
return (h); /* return head pointer */
}
/*********************************************/
void dsp_setup()
{
unsigned int temp;
/*********************************************/
/* Disable watchdog timer */
/*********************************************/
temp = WDCR;
temp = temp|0x68;
WDCR = temp;
/*********************************************/
/* initialize PLL module (20 MHz XTAL1) */
/*********************************************/
CKCR1 = 0x61; /* crystal=20MHz CPUCLK = 40MHz */
/* and 2x PLL mult ratio */
CKCR0 = 0xc3; /* low–power mode 0, */
/* ACLK enabled, */
/* PLL enabled, */
/* SYSCLK=CPUCLK/2 */
SYSCR = 0x40c0;
}
/* Initiate the event management register */
void eventmgr_init()
{
GPTCON=0x0442;
/* Initialize T1 */
T1PER=0x1f40; /* Period is 200us */
T1CMP=0x0fa0;
T1CON=0x9042;
/* Initialize T2 */
T2PER=0x0320; /* Period is 20us */
T2CON=0x9040;
/* Setup shared pins */
OCRA = 0xf800; /* pins IOPB0–IOPB3 & IOPA0–IOPA2 to I/O pins */
OCRB = 0x00f1; /* pins are: ADSOC, XF, /BIO, CAP1–CAP4 */
PADATDIR = 0x0700; /* outputs IOPA0–IOPA2, set low */
PBDATDIR = 0x0707; /* outputs IOPB0–IOPB2, set high */
/* Initialize T3 */
T3CNT=0x0;
T3PER=0xffff;
T3CON=0x9440; /* Prescaler=/16 */
/* Setup capture units */
CAPCON = 0x0; /* reset capture control register */
CAPFIFO= 0x0ff; /* Clear FIFO’s */
CAPCON = 0xa640; /* enable #1, use Timer3, high edges */
/* start CAP */
}
/********************************************************* */
unsigned int read_fifo(int capture)
{
unsigned int fifo_data;
int fifo_status;
if (capture == 1)
{
do {
fifo_data = FIFO1; /* read value */
fifo_status = CAPFIFO & 0x0300; /* read status register, mask bits */
}
while (fifo_status != 0);
}
else
fifo_data = 0xffff; /* error, not a valid capture */
return fifo_data;
}
/* ISR for GPT1,PDP interrupt */
void c_int2()
{
IFR=0x0002; /* clear CPU interrupt flag */
IFRA=0x7ff;
display_times++;
}
/* ISR for GPT3 interrupt */
void c_int3()
{
IFR=0x0004; /* clear CPU interrupt flag */
IFRB=0x0ff; /* clear interrupt flag */
T3overflow_counter++;
}
/* ISR for CAP unit interrupt */
void c_int4()
{
struct CAP_INT * p;
int groupc_flags;
int capture;
IFR=0x0008; /* clear CPU interrupt flag */
groupc_flags = IFRC; /* read event manger interrupt */
if (groupc_flags & 0x1)
{
capture = 1;
}
/* flag register */
else
{
/* not a valid capture */
capture = 0;
}
IFRC = 0xff;
p=CAP_p;
CAP_p=CAP_p->next;
CAP_p->CAP_value = read_fifo(capture); /* read FIFO */
CAP_p->delta_count=65536*T3overflow_counter+CAP_p->CAP_value-p->CAP_value;
T3overflow_counter=0;
}
/* initiating parameter and register */
void init_SRM()
{
velocity_value=0;
velocity_dotbit=4;
display_times=0;
T3overflow_counter=0;
CAP_p=creat_link();
}
/*******************************************************************/
void disable_interrupts()
{
asm(" SETC INTM");
}
/************************************************************************/
void enable_interrupts()
{
IFR = 0xffff; /* Clear pending interrupts */
IFRA = 0xffff;
IFRB = 0xffff;
IFRC = 0xffff;
IMR = 0x000e; /* Enable CPU Interrupts:INT 2,3,4 */
IMRA = 0x0080; /* Enable timer 1 period interrupts */
IMRB = 0x0010; /* Enable temer 3 period interrupts */
IMRC = 0x0001; /* Enable CAP1 interrupts*/
asm(" CLRC INTM"); /* Global interrupt enable */
}
/* display data on LCD */
void display(display_value,dot_bit)
unsigned int display_value; /* the value want to be displayed */
int dot_bit; /* dot bit */
{
unsigned int bit_value[4];
int x;
port1=0;
if (display_value>=2000)
port1=port1|0x40;
bit_value[3]=display_value%10; /* the lowest bit data */
bit_value[2]=(display_value/10)%10;
bit_value[1]=(display_value/100)%10;
bit_value[0]=display_value/1000; /* the highest bit data */
if (bit_value[0]==1)
port1=port1|0x02;
if (sign_state)
port1=port1|0x01;
x=dot_bit;
if (x!=4)
port1=port1|(1<<(x+1)); /* show radix point */
port2=bit_value[1];
port3=bit_value[2];
port4=bit_value[3];
if ((dot_bit==3)&&(bit_value[1]==0)&&(bit_value[0]==0))
port3=0x0f;
}
/* ***************************************************************** */
/* The main program
/* ***************************************************************** */
main()
{
unsigned int velocity;
disable_interrupts();
dsp_setup();
init_SRM();
eventmgr_init();
enable_interrupts();
for(;;)
{
if (display_times>=500)
{
display_times=0;
if (CAP_p->delta_count==0)
velocity=0;
else
velocity=VELOCITY_CONST*10/CAP_p->delta_count;
velocity_value=velocity;
if (velocity_value%10)
{
velocity_value=velocity;
velocity_dotbit=3;
if (velocity_value>=2000)
{
velocity_value=velocity/10;
velocity_dotbit=4;
}
}
else
{
velocity_value=velocity/10;
velocity_dotbit=4;
}
display(velocity_value,velocity_dotbit);
}
}
}
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