📄 reset.c
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#if 1
regs0->timer2_reload = 0x4;
regs0->timer2_divisor = 0xffff;
regs0->timer2_ctrl = 0; // stop: this timer is used in performance meter
#endif
#ifdef SPHE1000
#define TIMER3_PERIOD 0.01 // in second
#define TIMER3_PRES (SYSCLK/1000000)
#else
#define TIMER3_PERIOD 0.002 // in second
#define TIMER3_PRES 2000
#endif
regs0->timer3_reload = (unsigned)((TIMER3_PERIOD*SYSCLK)/TIMER3_PRES) - 1;
regs0->timer3_divisor = TIMER3_PRES-1;
regs0->timer3_ctrl = 3; // go and reload
}
#ifdef DVD_SERVO
void ServoDecInit(void);
void ResetInterfaceProc(void);
#endif
#ifndef DVDRELEASE
#define SUPPORT_UART0_INTR
//#define SUPPORT_UART1_INTR
#define write_stamp(n) (regs0->stamp = (n))
#endif
#ifndef write_stamp
#define write_stamp(n) ((void)0)
#endif
enum {
STAMP_RESET_START = 0x01,
STAMP_RESET_SYSTEM,
STAMP_CHANGE_SYSCLK,
STAMP_LOAD_MODULE_OTHER,
STAMP_LOAD_MODULE_CDROM,
STAMP_DISABLE_VIDEO,
STAMP_ENABLE_INTR_0,
STAMP_RESET_WATCHDOG,
STAMP_LOAD_MODULE_MPEG,
STAMP_LOAD_MODULE_AP,
STAMP_LOAD_MODULE_AP2,
STAMP_LOAD_MODULE_FREE,
STAMP_RESET_OSD,
STAMP_CONFIG_MEMORY,
STAMP_ENABLE_INTR_1,
STAMP_RESET_FINISHED,
};
//
// FUNCTION
// reset_all
//
// DESCRIPTION
// reset all, including some interface.
//
// *DISABLE INTR
// *REGF + ROMIF setup
// *EMUIO/UART setup (interrupt not yet enabled)
// *APLL setup (before GPIO for correct XCK)
// *GPIO setup
// *SDRAM size setup
// *TIMER setup
// *SDRAM memory mapping configuration
// *VIDDEC
// *SUP
// *MULTI-TASK
// *ENABLE INTR
// *IOP
// *IR (iop)
// *VFD (iop)
// *TV-encoder (iop)
// *DAC (iop)
//
//
/**************************************************************************
* Function Name: reset_all_enter *
* Purposes: *
* 1. disable CPU-level intr_enable *
* 2. disable watchdog *
* 3. write stamp Start *
* Descriptions: *
* reset Start *
* Arguments: None *
* Returns: None *
* See also: None *
**************************************************************************/
static void
reset_all_enter(void)
{
// disable CPU-level intr_enable
cpu_intr_disable();
// disable watchdog, we are about to reset all sub-systems
watchdog_onoff(0);
#ifdef UART0_SHARE_WITH_UART1
sft_uart0_share_uart1_pins();
#endif
#ifdef UART_SWAP //axel swap uart0 and uar1 2004/10/29
sft_uart_swap();
#endif
write_stamp(STAMP_RESET_START);
}
/**************************************************************************
* Function Name: reset_all_exit *
* Purposes: *
* 1. report fpga/sdram/rom/anchors *
* 2. test sdram *
* 3. write stamp finished *
* Descriptions: *
* reset Finished *
* Arguments: None *
* Returns: None *
* See also: None *
**************************************************************************/
static void
reset_all_exit()
{
//
// report/testing
//
#ifndef DVDRELEASE
// report_fpga_status();
// report_sdram_parameter();
// report_rom_parameter();
// report_anchors();
#endif
#ifdef DRAM_TEST
#include "tstsdram.c"//4-3-30 21:40
test_sdram();
#endif
//
// finished
//
write_stamp(STAMP_RESET_FINISHED);
if (check_chipinfo(4)==0) return -1;
}
/**************************************************************************
* Function Name: reset_all_enable_intr_only_uart *
* Purposes: *
* 1. reset interrupt flags *
* 2. INTERRUPT for bootstrap is initialized *
* 3. enable CPU-level intr_mask (IP2/IP3) *
* 4. enable CPU-level intr_enable *
* Descriptions: *
* Currently only UART is enabled during bootstrap (if required). *
* Arguments: None *
* Returns: None *
* See also: None *
**************************************************************************/
static void
reset_all_enable_intr_only_uart()
{
//
// reset interrupt flags
regs0->intr_flag = -1;
regs0->intr1_flag = -1;
//
// INTERRUPT for bootstrap is initialized here.
// Currently only UART is enabled during bootstrap (if required).
//
regs0->intr_mask = 0
#ifdef SUPPORT_UART0_INTR
| INTR_UART0_INT
#endif
#ifdef SUPPORT_UART1_INTR
| INTR_UART1_INT
#endif
;
regs0->intr1_mask = 0
;
cpu_set_intr_mask((1<<2)|(1<<3)); // enable CPU-level intr_mask (IP2/IP3)
cpu_intr_enable(); // enable CPU-level intr_enable
}
/**************************************************************************
* Function Name: reset_all_enable_intr_all *
* Purposes: *
* 1. reset intr_flag (bitwise-clear-upon-write-1) *
* 2. reset intr_mask *
* Descriptions: *
* enable normal interrupt processing *
* Arguments: None *
* Returns: None *
* See also: None *
**************************************************************************/
static void
reset_all_enable_intr_all(void)
{
//
// reset intr_flag (bitwise-clear-upon-write-1)
regs0->intr_flag = -1;
regs0->intr1_flag = -1;
#ifndef DVDRELEASE
regs0->sdctrl_int = 0;
regs0->sdctrl_int_mask = 0x80; // sdram over-range
#endif
// reset intr_mask
regs0->intr_mask = 0
| INTR_FIELD_END | INTR_FIELD_START | INTR_PIC_END
| INTR_RI_WATCHDOG
| INTR_DECERR
| INTR_TIMER0
| INTR_TIMER1
#if defined(SPHE1000) && defined(SUPPORT_USB)
| INTR_USB
#endif
#ifdef SUPPORT_UART0_INTR
| INTR_UART0_INT
#endif
#ifdef SUPPORT_UART1_INTR
| INTR_UART1_INT
#endif
#ifdef SUPPORT_UART_UPGRADE
| INTR_UART1_INT // for performing flash upgrading via UART
#endif
#ifdef SUPPORT_UART_COMMAND //kenny support uart to communicate with external MCU
| INTR_UART1_INT // for uart command
#endif
#ifdef DVD_SERVO
| INTR_H_PIO_INT
#endif
#ifdef STB_2_0
| INTR_RISC_INT3
#endif
#ifdef DVD_SERVO
| INTR_SRV_INT3
| INTR_SRV_INT2
| INTR_SRV_INT1
| INTR_SRV_INT0
#endif
;
regs0->intr1_mask = 0
| INTR1_LSWITCH_INTR_FLAG // lswitch watchdog
#ifdef DVD_SERVO
| INTR1_TIMER3B // timer for servo use
#endif
| INTR1_TIMERW // timer of watchdog
#ifndef DVDRELEASE
#ifdef ENABLE_SDRAM_OV_RANGE_INTR
| INTR1_SD // sdram-controller out-of-range
#endif
#endif
#ifdef SPHE8202
| INTR1_USB // USB
#endif
#if 0
// not-used
| INTR1_TIMER2A
| INTR1_TIMER2B
| INTR1_TIMER3A
#endif
;
}
#ifdef CS4360 //huziqin 2004-2-26
#define CS4360_ADDR 0x20
/*
mode control 1:
addr 01h
AMUTE 7
DIF 4-6
DEM 2-3
FM 0-1
mode control 2:
addr 0ch
SZC 6-7
CPEN 5
PDN 4
POPG 3
FREEZE 2
MCLKDIV 1
SNGLVOL 0
*/
/**************************************************************************
* Function Name: config_cs4360 *
* Purposes: *
* cofig cs4360 mode *
* Descriptions: *
* config_cs4360 *
* Arguments: *
* mode control 1: *
* addr 01h *
* AMUTE 7 *
* DIF 4-6 *
* DEM 2-3 *
* FM 0-1 *
* *
* mode control 2: *
* addr 0ch *
* SZC 6-7 *
* CPEN 5 *
* PDN 4 *
* POPG 3 *
* FREEZE 2 *
* MCLKDIV 1 *
* SNGLVOL 0 *
* Returns: None *
* See also: None *
**************************************************************************/
void config_cs4360(void)
{
BYTE data;
int res;
/*mode ctrl 2*/
data = 0xa8;
res = WriteToI2c(CS4360_ADDR, 0x0c, &data, 1);
/*mode ctrl 1*/
data = 0x90;
res = WriteToI2c(CS4360_ADDR, 0x01, &data, 1);
//printf("config 4360 res == %d\n ",res);
}
#endif //cs4360
/**************************************************************************
* Function Name: reset_tvdac *
* Purposes: *
* 1. disable video dac *
* 2. enable osd *
* 3. enable tv-encoder *
* Descriptions: *
* reset TV dac *
* Arguments: None *
* Returns: None *
* See also: None *
**************************************************************************/
static inline void
reset_tvdac(void)
{
#if 0
regs0->tv_mode[5] = 0x60bf;
regs0->tv_mode[5] = 0x003f;
delay_1ms(1000);
#endif
//
regs0->vpp_bg_y = 0x00;
regs0->vpp_bg_cb_cr = 0x8080;
regs0->dis_x_size = 0;
regs0->dis_y_size = 0;
// enable osd
regs0->osd_mode[0] = 0x8000;
regs0->osd_tv_std = 0;
// enable tv-encoder
regs0->tv_mode[0] = 0x0400;
regs0->tv_mode[2] = 0x0000;
regs0->tv_mode[5] &= ~0x6080; // enable tv-encoder
regs0->tv_mode[5] &= ~0x003f; // enable DAC
#ifdef SPHE8202
regs0->tv_dac[0] = (6<<6) | (6<<3) | (0<<0);
regs0->tv_dac[1] = (6<<6) | (6<<3) | (6<<0);
#endif
}
/**************************************************************************
* Function Name: reset_vpp_par *
* Purposes: *
* change vpp_par_mode *
* Descriptions: *
* VPP Pixel Aspect Ratio *
* Arguments: None *
* Returns: None *
* See also: None *
**************************************************************************/
void reset_vpp_par()
{
int flag=0;
#ifdef PAR_MP_FORCE_SQUARE
flag |= VPP_PAR_MP_FORCE_SQUARE;
#endif
#ifdef PAR_MP4_FORCE_SQUARE
flag |= VPP_PAR_MP4_FORCE_SQUARE;
#endif
#ifdef PAR_MP4_GUESS_43TV
flag |= VPP_PAR_MP4_GUESS_43TV;
#endif
#ifdef PAR_MP4_REVERSE_169TV
flag |= VPP_PAR_MP4_REVERSE_169TV;
#endif
setup_vpp_par_mode(flag);
}
#if defined(DVB1000_NON_OS) && defined(SUPPORT_USB)
void reset_usb()
{
UINT32 *iptr;
iptr = (UINT32*)0xbc030004;
*iptr = 0x1; //??
iptr = (UINT32*) 0xbc030020;
*iptr = 0x1c020000;
delay_1ms(1);
iptr = (UINT32*)0xbc020014;
*iptr = 0x27777;
iptr = (UINT32*)0xbc030004;
*iptr = 0x0;
}
#endif //#if defined(DVB1000_NON_OS) && defined(SUPPORT_USB)
#ifdef SPHE8202 //nono
UINT16 gpGPIOini;
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