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📄 reset.c

📁 Sunplus 8202S source code.
💻 C
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/**************************************************************************
 *                                                                        *
 *         Copyright (c) 2002 by Sunplus Technology Co., Ltd.             *
 *                                                                        *
 *  This software is copyrighted by and is the property of Sunplus        *
 *  Technology Co., Ltd. All rights are reserved by Sunplus Technology    *
 *  Co., Ltd. This software may only be used in accordance with the       *
 *  corresponding license agreement. Any unauthorized use, duplication,   *
 *  distribution, or disclosure of this software is expressly forbidden.  *
 *                                                                        *
 *  This Copyright notice MUST not be removed or modified without prior   *
 *  written consent of Sunplus Technology Co., Ltd.                       *
 *                                                                        *
 *  Sunplus Technology Co., Ltd. reserves the right to modify this        *
 *  software without notice.                                              *
 *                                                                        *
 *  Sunplus Technology Co., Ltd.                                          *
 *  19, Innovation First Road, Science-Based Industrial Park,             *
 *  Hsin-Chu, Taiwan, R.O.C.                                              *
 **************************************************************************/
/*--------------------------------------------------------------------------
|  File Name   :  reset.c
|
|  Description :   .... reset system
|                 when system need reset,it will goto the file.
|
|
|  Version    :  0.1  
|  
|  Rev    Date              Author(s)      Status & Comments
|-----------------------------------------------------------------------------------------
|  0.1  2004/2/7            Terry          Add DVD Preview function and re-structure code
|  0.1  2004/12/31          caoh           Add Comments
|-----------------------------------------------------------------------------------------*/

#include "config.h"
#include "regmap.h"
#include "global.h"

#include "syscfg.h"
#include "sysclk.h"

#include "load.h"
#include "macro.h"
#include "dma.h"
#include "memcfg.h"
#include "stc.h"
#include "func.h"
#include "cpu.h"
#include "intdef.h"

#include "gpio.h"
#include "uart.h"
#include "uartfifo.h"
#include "viddec.h"

#include "kernel.h"
#include "supfunc.h"

#include "hwif.h"
#include "framebuf.h"   //Jeff 20010717
#include "task.h"
#include "audio.h"
#include "lbaif.h"
#include "cs8403a.h"    //kenny
#include "dvdpe.h"
#include "preview.h"
#include "tvif.h"

#include "test.h"
#include "sio.h"
#include "emuio.h"
#include "user_init.h"

//#define SHOW_SYSTEM_CLOCK

//#ifdef   DVDRELEASE
#ifndef SDRAM_BUS_32BITS
#ifndef SDRAM_16Mb_Mode//terry,2003/11/18 02:04PM
#define  UART0_SHARE_WITH_UART1
#endif
#endif
//#endif

#ifdef QSI_SHOW_ERR_RATE   
    #undef  UART0_SHARE_WITH_UART1
#endif          

#include "reset.h"
#if defined(PT2322)||defined(PT2320)
#include "audctrl.h"
#endif
#ifdef TAS3001_AMP    //
#include "ti3001.h"
#endif

#ifdef TAS5026_AMP    //
#include "ti5026.h"
#endif

#ifndef EMULATION
//#define SETUP_DAC
#endif

#ifndef DVDRELEASE
//#define RESET_DBG 1
//#define DRAM_TEST 1
//#define TASK_GBG  1//??
#endif

#define DRAM_TEST_16MB
//#define DRAM_TEST_64MB

#ifdef  RESET_DBG   /* alan 02-05-24 */
//#define MONE_CHKSUM
#define MONE_CONFIG
#define reset_status_puts(s)        io_write_wait(s)
#define reset_status_puts_direct(s) io_write(s)
#endif

#ifndef reset_status_puts
#define reset_status_puts(s)        ((void)(s))
#endif

#ifndef reset_status_puts_direct
#define reset_status_puts_direct(s) ((void)(s))
#endif


#ifdef CS8403_ENABLE
//extern void init_cs8403a__(void);
#include "cs8403a.c"
#endif


//
// SPHE8202 tuning
//
#ifdef  SPHE8202
#if 0
#undef  F121_5
#undef  F114_75
#undef  F108
#undef  F94_5
#undef  F81
//#define F81
//#define F108
#define F114_75
//#define F121_5
//#define F128_25
//#define F135
#endif
#endif

#ifdef  SPHE8202
#define ROM_SDRAM_SHARE_BUS
//#define SUPPORT_USB
#endif

#ifdef  SUPPORT_USB
#define USB_CONFIG_PLL
#define CLK54_USE_USBPLL
#endif

#include "sbar.inc"


//
// EPROM_WAIT_STATE
// *NOTE* ROM access time will be n+1 cycles.
//
//  value   cycle   108 94.5    81  67.5    54
//  --------------- ------------------------------- -----
//  3   4   36.8    42.33   48  59.2    74
//  4   5   46  52.91   60  74  92.5
//  5   6   55.2    63.49   72  88.8    111
//  6   7   64.4    74.07   84  103.6   129.5
//  7   8   73.6    84.66   96  118.4   148
//  8   9   82.8    95.24   108 133.2   166.5
//  9   10  92.6    105.82  123.5
//  10  11  101.9   116.40  135.8
//  11  12  111.1   126.98  148.1
//  12  13  120.37  137.57  160.49
//  13  14  129.63  148.15  172.84
//  14  15  138.89  158.73  185.19
//  15  16  148.18  169.31  197.53
//

#define ROM_TACC_DEFAULT    85

#define SYSCLK_CYCLE    ((unsigned)(1.0E9/SYSCLK))      // in ns unit
#define ROM0_TACC       ROM_TACC_DEFAULT
#define ROM1_TACC       ROM_TACC_DEFAULT
#define ROM2_TACC       ROM_TACC_DEFAULT
#define ROM3_TACC       ROM_TACC_DEFAULT

#define ROM0_WAITST     (SYSCLK_CYCLE/ROM0_TACC)
#define ROM1_WAITST     (SYSCLK_CYCLE/ROM1_TACC)
#define ROM2_WAITST     (SYSCLK_CYCLE/ROM2_TACC)
#define ROM3_WAITST     (SYSCLK_CYCLE/ROM3_TACC)

/*
#ifdef BBK_DVD//zhoayanhua add 2003-11-24 14:24
//ircmd_video.c
extern void tv_init_output(void);
#endif
*/
extern void dac_setup();
extern void reset_iop();
extern void reset_vfd(void);

// sysmain.c
extern void LoadModual(UINT16 iModuleIndex);

// crt0.S
extern void set_sdram_timing_low(void);
extern void set_sdram_timing(void);

// current file
UINT32 rom_checksum(void);
int reset_change_sysclk(void);
int reset_change_sysclk_27M(void);
int change_system_clock(int);

/**************************************************************************
 *  Function Name: reset_system                                           *
 *  Purposes:                                                             *
 *   1. setup register file pointer (regs0 / s6)                          *
 *   2. reset/enable hardware modules                                     *
 *   3. setup watchdog/scrambling                                         *
 *   4. setup rom1/2/3 bases                                              *
 *   5. setup ROM/FLASH interface                                         *
 *   6. setup system-bus arbitrator                                       *
 *   7. reset audio                                                       *
 *  Descriptions:                                                         *
 *    reset following subsystems to a known state                         *
 *  Arguments:  None                                                      *
 *  Returns: None                                                         *
 *  See also: None                                                        *
 **************************************************************************/
void
reset_system(void)
{
    // setup register file pointer (regs0 / s6)
    InitRegFile();

    regs0->emulation    = 0;        // disable emulation functions
    regs0->reset        = 0x0000;   //
#ifdef SPHE1000
    regs0->reset2       |= 0x2080;   // (boot-strap / tdm / cddsp)
#else
    regs0->reset2       = 0x3080;   // (boot-strap / tdm / cddsp)
#endif
    regs0->clken0       = 0xff7f;   // (grfx)
    regs0->clken1       = 0xffff;   // ()
    regs0->gclken0      = 0xffff;
    regs0->gclken1      = 0xffff;

    // [15:13] atg
    // [7:6] dtg
    // [1:0] watchdog
    regs0->lbc_watchdog   = 0x03;     // disable watchdog/tog

    // setup rom1/2/3 bases
#ifdef SPHE1000 //MIKEY 2004.05.25
    regs0->rom1_base      = 0x00800000 >> 16;       // rom1 m*64k-base  8MB
    regs0->rom2_base      = 0x01000000 >> 16;       // rom2 n*64k-base 16MB
    regs0->rom3_base      = 0x02000000 >> 16;       // rom3 n*64k-base 32MB
#else
    regs0->rom1_base      = 32;       // rom1 m*64k-base
    regs0->rom2_base      = 32;       // rom2 n*64k-base
    regs0->rom3_base      = 32;       // rom2 n*64k-base
#endif

#define VPP_CONFIG1_URGE_EN     (1<<4)//terry,2->4
#define VPP_CONFIG1_URGE_DIS    (0<<4)
#define VPP_CONFIG1_MB45        0       // 720
#define VPP_CONFIG1_MB64        1       // 1024
#define VPP_CONFIG1_MB22        2       // 352
#define VPP_CONFIG1_MB30        3       // 480

#if 1
    regs0->mc_mbwidth       = 45;
    regs0->vpp_config1  = VPP_CONFIG1_URGE_DIS|VPP_CONFIG1_MB45;
#else
    regs0->mc_mbwidth       = 64;
    regs0->vpp_config1  = VPP_CONFIG1_URGE_DIS|VPP_CONFIG1_MB64;
#endif

    vpp_zoom_max    = VPP_ZOOM_MAX;

    //
    // setup ROM/FLASH interface
    regs0->rom_config = 0xf000;     // always no pre-fetch
#if 0
#ifdef ROM_SDRAM_SHARE_BUS
    regs0->rom_config = 0xf000;     // no pre-fetch
#else
    regs0->rom_config = 0xf00f;     // with pre-fetch
#endif
#endif

    {
        unsigned u;
        u = (ROM0_TACC/SYSCLK_CYCLE) | ((ROM1_TACC/SYSCLK_CYCLE)<<8);
        regs0->wait_cyc1_0 = u;
        u = (ROM2_TACC/SYSCLK_CYCLE) | ((ROM3_TACC/SYSCLK_CYCLE)<<8);
        regs0->wait_cyc3_2 = u;
    }

    //
    // setup system-bus arbitrator
    {
        unsigned i;
        for (i=0;i<sizeof(sbar_prr)/sizeof(sbar_prr[0]);i++)
            regs0->sbar_prr[i] = sbar_prr[i];
    }

#ifndef NO_AUDIO_DSP
    // audio
    regs0->aud_reset = 1;
    regs0->aud_reset = 0;
#endif
}


#ifdef  MONE_CHKSUM
/**************************************************************************
 *  Function Name: rom_checksum                                           *
 *  Purposes:                                                             *
 *    At present, the funtion don't used                                  *
 *  Descriptions:                                                         *
 *    calculate rom check-sum (of first 512kbyte)                         *
 *  Arguments:  None                                                      *
 *  Returns: None                                                         *
 *  See also: None                                                        *
 **************************************************************************/
UINT32
rom_checksum(void)
{
    int i;
    UINT32 chksum=0;
    UINT32 *p = (UINT32 *)(ROM_BASE_CACHED);
    for (i=0;i<(512*1024/4); i++)
    {
        chksum += *p++;
    }
    return chksum;
}
#endif


#ifdef BOOT_LOAD//terry,2005/1/30 09:21PM
#include "rommap_romb.h"
/**************************************************************************
 *  Function Name: rom_checksum                                           *
 *  Purposes:                                                             *
 *    At present, the funtion don't used                                  *
 *  Descriptions:                                                         *
 *    calculate rom check-sum (of first 512kbyte)                         *
 *  Arguments:  None                                                      *
 *  Returns: None                                                         *
 *  See also: None                                                        *
 **************************************************************************/
UINT32 rom_checksum_per_kbyte(int st,int end)
{
    int i;
    UINT32 chksum=0;    
    UINT32 *p1;
    UINT32 *q= (UINT32 *)(ROM_BASE_UNCACHED+ORG_BOOT_ROM_CHK_SUM);
    
    for (i=st;i<end; i++)
    {
        p1=(UINT32 *)( ROM_BASE_UNCACHED+(i*1024) );
        //printf("-%x: %x-\n",p1,*p1 );
        chksum += *p1;
        // delay_1ms(1000);
    }
    
    //printf("\n\n == chksum:%x q:%x==\n\n\\n",chksum,*q);
    
    if(*q==chksum) return 1;//goto boot rom
    else return 0;
}
#endif

/**************************************************************************
 *  Function Name: init_timer                                             *
 *  Purposes:                                                             *
 *   1. setup STC 90kHz                                                   *
 *   2. setup RTC 100Hz                                                   *
 *   3. setup regs0->timer0_ctrl                                          *
 *   4. setup timer2                                                      *
 *   5. setup timer3                                                      *
 *  Descriptions:                                                         *
 *    reset following subsystems to a known state                         *
 *  Arguments:  None                                                      *
 *  Returns: None                                                         *
 *  See also: None                                                        *
 **************************************************************************/
void    init_timer(void)
{
  // setup STC 90kHz
#if defined(SPHE8202) || defined(SPHE1000)
  regs0->stc_divisor    = (1<<15) | (150-1);
#else
  regs0->stc_divisor    = STC_DIVISOR;
#endif

  // setup RTC 100Hz
  regs0->rtc_divisor    = 900-1;
//terry,2004/2/17 06:08PM
//if defined "SHOW_STANDBY_TIMER",timer0 would be used.suqiaoli modified 2004-2-26
#if (defined(DVDRELEASE)|| !defined(TASK_GBG))&&!defined(SHOW_STANDBY_TIMER)
  regs0->timer0_ctrl    = TIMER_CONFIG_STOP;

#else

#ifdef DVD_SERVO
#ifdef EMU_MODE
  regs0->timer0_ctrl    = TIMER_CONFIG_1ms;
#else
  regs0->timer0_ctrl    = TIMER_CONFIG_10ms;
#endif
#else
  regs0->timer0_ctrl    = TIMER_CONFIG_4ms;
#endif


#endif



  regs0->timer1_ctrl    = TIMER_CONFIG_STOP;


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